ATSAME51j18 dev board with split rail powersupply

[Cen3mode]

I've just finished making the first version of a schematic for my ATSAME51j18 dev board which has a split power rail supply. I'm pretty new to working with barebone components such as microcontrollers and regulators so can somebody check the schematic for rookie errors. The schematic is attached underneath. I am grateful to everybody who gives it a look  .

[ataradov]

Usually by "split power rail supply" people understand that MCU using different voltage on VDDIO and VDDIOB. It is clearly not the case here. This is just a design with multiple power supplies. And from what I see 5V supply only goes to the CAN and it is decoupled from the rest of the system with a transceiver. This is fine.

From a quick look, you are missing decoupling capacitors on the MCU VDD lines.

Microchip has a free design review service. You can submit this there. It is likely to go to me anyway, but I will be able to spend more time reviewing this.

[Cen3mode]

Thanks for the response . I was mostly worried that I had messed something up with the USB C connector but it seems that it's all right. I've added a 4.7uf cap as a decoupling capacitor for the microcontroller. I will look at the microchips schematic review service that you told me about. And thanks again .

[ataradov]

You need to have one 0.1 uF capacitor per VDDIO pin.

And the same for the CAN transceiver.

Generally every power supply pin needs to have its own capacitor.

[Cen3mode]

Does it have to be exactly 100pf for every VDD pin or can it be a bit larger? Will it have any side effects if it will?

[ataradov]

It is 100 nF, not 100 pF. It does not have to be exactly that, but 100 nF is the most commonly used value for this purpose. It is a good compromise on capacity, availability and price.