Prototype Block Diagram review

[Nikos A.]

Hi everyone,

I design the block diagram of a prototype I want to build.
The system is going to be battery operated and I am looking for low energy solutions

There are 5 x reed switches (RS1...RS5) triggered from a magnet (one magnet for every single reed switch).
The initial state of the reed switch is LOW and the MCU is in deep sleep mode.
When any of the reed switches change state (from LOW->HIGH) the MCU wakes up (through external interrupt) and starts reading the state of the reed switches through the Multiplexer.
It is possible more than one reed switches be HIGH at the same time (basically it could be 2^5 combinations)
In case that all the reed switches return to LOW state, the MCU will jump into a deep sleep state for energy saving.

Do you have any recommendations about this topology? Or any suggestions for improvement?

[TomS_]

Are the reed switches switching digital signals (as in a simple high or low logic state), or are they switching an analogue signal that then needs to be read by an ADC?

If the signals are digital, I can't think of a reason why you need the mux at all, you could simply read the value of the port register they are attached to when one of them causes an interrupt.

Edit: just noticed "digital read" at the bottom there.

So unless there's something I'm missing, I think the mux is completely unnecessary. If your MCU can't do pin change interrupts and allow you to read their value at the same time, find a better MCU. :-)

[Ian.M]

Ordinary reed switches are Form A, i.e. contacts are open in the absence of a magnetic field.  If they are in a strong enough magnetic field the contacts close.  You can also get Form C (changeover) reed switches made with the NC contact nonmagnetic, but they are significantly more expensive.

If you use ordinary Form A reed switches you must attempt to pass a current through them to read their state, which may be problematic in a low power application, if their normal state is closed due to the presence of an external magnet.  Five switches all pulling low against the internal weak pullups of a typical MCU could well draw as much as 1mA, which in most low energy applications would be unacceptable.

[Nikos A.]

Thank you both!! Your advice was exactly on the target.

If you use ordinary Form A reed switches you must attempt to pass a current through them to read their state, which may be problematic in a low power application, if their normal state is closed due to the presence of an external magnet.  Five switches all pulling low against the internal weak pullups of a typical MCU could well draw as much as 1mA, which in most low energy applications would be unacceptable.

I am considering using normally open reed switches. I found this one https://eu.mouser.com/ProductDetail/Littelfuse/MITI-3V1-6-8?qs=U0ECReq1GB89%2FgRTIH2Y6g%3D%3D that provides high sensitivity to magnetic fields. Now regarding power consumption, my objective is to design a battery operated system and I want to achieve as low energy consumption as possible. I was thinking to use an external week pull down resistor netowrk. For example at 3.3V and 2MΩ resistors the current consumption is around 1.5uA per switch.

What is your opinion? Is there a better approach?

Are the reed switches switching digital signals (as in a simple high or low logic state), or are they switching an analogue signal that then needs to be read by an ADC?

Yes they are switching digital signals

If the signals are digital, I can't think of a reason why you need the mux at all, you could simply read the value of the port register they are attached to when one of them causes an interrupt.

Edit: just noticed "digital read" at the bottom there.

So unless there's something I'm missing, I think the mux is completely unnecessary. If your MCU can't do pin change interrupts and allow you to read their value at the same time, find a better MCU. :-)

I do not have a lot of experience regarding MCUs. I am considering to use this MCU module from Espresiff https://www.espressif.com/sites/default/files/documentation/esp32-s2-mini-1_esp32-s2-mini-1u_datasheet_en.pdf

and here is the TRM https://www.espressif.com/sites/default/files/documentation/esp32-s2_technical_reference_manual_en.pdf

I didn't know that I can use the same pin to create interrupts and then to read its state (high/low). How can I check if the MCU I've found provides this functionality? I mean what information I should check in the TRM?

Thanks
Nick

[Ian.M]

Mouser's website isn't working for me at the moment.  Here's the MITI-3V1-6-8 datasheet direct from Littelfuse.

As I suspected its a Form A (N.O.) reed switch and from your description, the magnet isn't activating the switch when you want it to be in power-save mode. 

I wouldn't rely on a 2Meg resistor to hold a GPIO pin at a valid high or low level.  The datasheets you linked specifies the input leakage current as max. 50nA, but it would be very difficult to achieve that in real life due to board surface leakage.  50nA through 2Meg is 0.1V.  The ESP32 has 25% & 75% (of Vcc) input thresholds.  At 3.3V, that's 0.825V & 2.475V so with a 2Meg pulldown you will run into trouble if the total leakage is over 0.4uA, and will get false triggering due to noise pickup long before that the upper limit

The ESP32 internal pullups/pulldowns are nominally 40K, so one strategy would be to poll closed switches with a 1:50 duty cycle, which would give you comparable current consumption to using 2Meg external pulldowns.  As the input must not be left floating, in-between polls, it should be pulled to (or driven to)  the same level as the switch connects it to.  Personally I'd wire the switches as active low, as it decreases the risk of any short-circuits causing damage.

Depending on wiring length and screening you may need low-pass filtering at the input pins to achieve acceptable EMI immunity.  Littlefuse do not recommend in excess of 100nF directly across a reed switch: https://m.littelfuse.com/~/media/electronics/application_notes/reed_switches/littelfuse_magnetic_sensors_and_reed_switches_capacitive_loads_application_note.pdf.pdf
and in a low duty cycle switched pullup application, you also have to be concerned about the RC time constant with the internal pullup, so the size of the filter capacitance and the required duty cycle determine the max polling rate.  How much lag between switch opening and its detection can your application tolerate?

Also "A Guide to Debouncing, or, How to Debounce a Contact in Two Easy Pages", by Jack Ganssle is essential reading: http://www.ganssle.com/debouncing.htm

[Nikos A.]

Thank you very much @Ian.M

I wouldn't rely on a 2Meg resistor to hold a GPIO pin at a valid high or low level.  The datasheets you linked specifies the input leakage current as max. 50nA, but it would be very difficult to achieve that in real life due to board surface leakage.  50nA through 2Meg is 0.1V.  The ESP32 has 25% & 75% (of Vcc) input thresholds.  At 3.3V, that's 0.825V & 2.475V so with a 2Meg pulldown you will run into trouble if the total leakage is over 0.4uA, and will get false triggering due to noise pickup long before that the upper limit

xmm as a newbie I never took into consideration the effect of resistor values to high and low levels based on leakage current. Good to know thanks!!

As the input must not be left floating, in-between polls, it should be pulled to (or driven to)  the same level as the switch connects it to. Personally I'd wire the switches as active low, as it decreases the risk of any short-circuits causing damage.

By active low switch wiring you mean something like this right (I am using the internal pull up resistor)?

The ESP32 internal pullups/pulldowns are nominally 40K, so one strategy would be to poll closed switches with a 1:50 duty cycle, which would give you comparable current consumption to using 2Meg external pulldowns.

Polling with 1:50 duty cycle means, reading the GPIO state every 800ms?

[Ian.M]

xmm as a newbie I never took into consideration the effect of resistor values to high and low levels based on leakage current. Good to know thanks!!

As the input must not be left floating, in-between polls, it should be pulled to (or driven to)  the same level as the switch connects it to. Personally I'd wire the switches as active low, as it decreases the risk of any short-circuits causing damage.

By active low switch wiring you mean something like this right (I am using the internal pull up resistor)?

Yes, exactly that.

The ESP32 internal pullups/pulldowns are nominally 40K, so one strategy would be to poll closed switches with a 1:50 duty cycle, which would give you comparable current consumption to using 2Meg external pulldowns.

Polling with 1:50 duty cycle means, reading the GPIO state every 800ms?

No. It depends how long it takes to read the I/O state.
 
If you don't have any filter capacitance at the pin the time to enable the pullup and read it could be under 1us (as the ESP32 is a fairly fast MCU), so polling every 50us could meet the 1:50 duty cycle target.

Lets assume the pullups are 40K and you have 10nF capacitance at the pin to filter transient noise and avoid false wakeup events.  The RC time constant is 40K*10nF = 400us.   Enable the pullups and, if the switch is open, after two time constants (800us) the pin voltage will have reached 86.5% of Vcc, sufficiently over the 75% threshold to give you a reliable readout with decent noise immunity.   However the internal pullup and external capacitor tolerances aren't *that* precise, so switching the pullup on for slightly under 1ms would be a safer choice.  To meet the 1:50 duty cycle requirement, you'd thus need to poll every 50ms, (20Hz) which is fast enough for the response to manually operated switches to be imperceptible to the user.  Any pins that read low at the last poll should have pulldown enabled instead of pullup for the interval between polls.  Any pins that read high, leave the pullups enabled so you don't waste power discharging and recharging the filter capacitor.

If you need faster polling you also need to reduce the RC time constant, which, if you are using internal pullups, means reducing the filter capacitor.

N.B. the switch should either have conductive elastomer contacts or a series resistor in the range 47 to 100 ohms to limit the loop current transient when the switch is closed on a fully charged filter capacitor.  If the switch simply shorts the capacitor,  it will ring with the loop inductance and can be a serious source of EMI or even cause latchup of the MCU.

[Nikos A.]

Thank you for your great responce @Ian.M

The ESP32 internal pullups/pulldowns are nominally 40K, so one strategy would be to poll closed switches with a 1:50 duty cycle, which would give you comparable current consumption to using 2Meg external pulldowns. 

How did you calculate the 1:50 duty cycle? I mean how did you compare the current consumption between polling with 1:50 duty cycle vs 2M external pull down?

[Ian.M]

2Meg/40K = 50, so you need to reduce the average current by that factor, hence 1:50 duty cyce.

[Nikos A.]

Thank you Ian, now everything are clear!!

I have one general question regarding the high/low level leakage current



This is the leakage current of the internal PMOS and NMOS attached to the GPIO?

[Ian.M]

This is the leakage current of the internal PMOS and NMOS attached to the GPIO?

In part.  You've also got a contribution from the high channel resistance weak pullup and pulldown MOSFETs in their off state, reverse biassed ESD protection diodes and gate oxide leakage of the input buffer.   Additionally on Analog enabled pins, there's the off state leakage of a transmission gate of the ADC MUX.  Note that that max. 50nA input current is only specified for high and low level inputs so if the input voltage is in the range 25% to 75% of Vcc, its unspecified and we *ASS*U*ME* its no greater . . .

[Nikos A.]

Thank you a lot!!