Author Topic: Question on buck converter layout  (Read 3095 times)

0 Members and 1 Guest are viewing this topic.

Offline thinkfatTopic starter

  • Supporter
  • ****
  • Posts: 2161
  • Country: de
  • This is just a hobby I spend too much time on.
    • Matthias' Hackerstübchen
Question on buck converter layout
« on: November 06, 2019, 09:54:56 am »
Hi,

I'm integrating a buck converter based on the TI LMR14030SDDAR into an adapter board for a GPSDO. I've attached the layout (top side only) and schematics here. I'm always scratching my head about the return currents, I think I've got it tight enough here, hopefully. The other head-scratcher is about the "cold" side of L201, for mechanical reasons there's a pretty large gap between L201 and the filter caps C206/C207, do you think this should be improved? The copper fill is pretty beefy, but I could duplicate it on the bottom layer and stitch it together with vias to reduce the impedance.

Output of the converter is 5.5V, around 2.2A peak, input will be 12V nominal. Switching frequency is set to 1MHz.
Everybody likes gadgets. Until they try to make them.
 

Offline T3sl4co1l

  • Super Contributor
  • ***
  • Posts: 22436
  • Country: us
  • Expert, Analog Electronics, PCB Layout, EMC
    • Seven Transistor Labs
Re: Question on buck converter layout
« Reply #1 on: November 06, 2019, 11:00:13 am »
Looks good. :-+

(Edit: also, I'm assuming the bottom side, or inner layer, has solid ground pour.)

(I tend to be verbose on explanations or critiques, so take this as high praise ... or at least a pat-on-the-back for following the appnote, which, I didn't look up this one specifically, but they usually show something very similar to this.  It's pretty good. :) )

I will note just two things and an optional third:
1. You may want an LC at the input there, to keep sharp edges out of the input cable.  You have the flanking bypass caps which is great, but they still have some ESL which lets through some of the switching edge.  The buck input side is a noisy place, because the current is fully switched, 100% on to off -- you might have, oh Idunno, 60dB of attenuation there (a factor of a thousand), but out of a ballpark 10V step, that's still enough mV to pick up on a nearby radio.

Typical would be just a 0.1 to 1uH inductor in series, and probably just one more of those ceramic caps at the connector.

Optional 3: you may want a TVS here, to prevent overvoltage, and maybe also a series diode to prevent reverse polarity.  The problem is this: you plug in a DC adapter that's already charged to nominal 12V or whatever, and an inrush surge flows through the cable.  The cable has maybe 1uH of inductance, so there is a series RLC circuit between the supply's bypass cap (something fairly large, 100s uF), the cable inductance and resistance, and your ceramic bypass caps (and their ESR).  The fatality is this: the ceramic caps' capacitance drops sharply at high voltages, so instead of kicking to a peak of less than about 24V (as a linear capacitor would do: a film or electrolytic), the peak voltage can be 30, or 50 or even 100V, and that can easily damage the regulator.

So, just a SMAJ15A in parallel with the filter caps by the regulator, would be simple insurance for that.  And for series polarity protection, a PMEG3020 or B130 or ES1B or whatever would be fine, or a P-ch FET if you need low voltage drop.

2. The diode is pretty huge -- 5A, but you're only using 2 of it.  This saves a bit on conduction losses (although not really all that much, because the diode Vf curve is exponential), but likely will cost more on switching loss -- the 100s of pF (or is that into the nF, I forget) junction capacitance has to be charged with every cycle, and it adds up.

So, simply to say -- you may find higher efficiency with a smaller diode.  And if you don't have high operating temps, don't be afraid of a relatively leaky diode (like the aforementioned PMEG family), they tend to have lower Vf.

(Still higher efficiency can be had from a synchronous type regulator.  TI makes one that delivers 3A from a mere SOT-23!)

Okay, so maybe I got verbose as usual, anyway. :P

Cheers!
Tim
« Last Edit: November 06, 2019, 11:02:17 am by T3sl4co1l »
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 
The following users thanked this post: JJalling, doktor pyta, Ian.M, jhpadjustable, thinkfat, aix

Online Siwastaja

  • Super Contributor
  • ***
  • Posts: 9334
  • Country: fi
Re: Question on buck converter layout
« Reply #2 on: November 06, 2019, 11:22:59 am »
You can still move the diode a bit closer. It's likely more than good enough as it is, but I tend to place the components as close as possible within the manufacturing tolerances (of course respecting the courtyards and component-to-component body clearances), because such dense SMD board would likely be reflow soldered, and won't be manually modified in any case, so extra space is of little practical use. Moving the silkscreen designators "outside" the dense area, in one blob where the texts are approximately rotated and placed like the components, helps.

Note that the inrush voltage peak issue Tim mentioned can be also solved by adding a lossy standard aluminium electrolytic capacitor at the input, so that its capacitance is at least twice-three times the capacitance of the ceramics in parallel with it. This helps dampen any ringing you get if you add an LC filter, so good for EMI, too.

Agree on using a smaller diode.
« Last Edit: November 06, 2019, 11:24:45 am by Siwastaja »
 
The following users thanked this post: T3sl4co1l, thinkfat

Offline capt bullshot

  • Super Contributor
  • ***
  • Posts: 3033
  • Country: de
    • Mostly useless stuff, but nice to have: wunderkis.de
Re: Question on buck converter layout
« Reply #3 on: November 06, 2019, 11:27:37 am »
In general, I second what Tim wrote, especially the part about protecting the input from plug-in overvoltage events. Looks like there's plenty of space left to add a nice large electrolytic paralleled to the input node, and some EMI suppression inductance in series.

Having a "longer wire" at the cold side of the inductor doesn't do much harm at all, its inductance just adds to the inductors value. It's a stable voltage node, and current ripple is relative harmless here EMI wise.
Go for small loops at these places first: Input capacitor + to switch input and input capacitor - to diode anode, and keep  the switching node as small as possible.
I'd further place the bootstrap cap closer to the switching node and try to elimitate that trace on the bottom side.
Edit: minize the total switching node area, e.g. I wouldn't flood fill a rather large with sw node potential.
« Last Edit: November 06, 2019, 11:29:54 am by capt bullshot »
Safety devices hinder evolution
 
The following users thanked this post: thinkfat

Offline thinkfatTopic starter

  • Supporter
  • ****
  • Posts: 2161
  • Country: de
  • This is just a hobby I spend too much time on.
    • Matthias' Hackerstübchen
Re: Question on buck converter layout
« Reply #4 on: November 06, 2019, 01:17:53 pm »
Thank you all for the input, I really appreciate it.

Regarding the suggestions:

The diode was chosen for a higher step-down ratio and current, I guess I can replace it with something like a SS33, or going for a smaller footprint, SK33SMB or maybe even SKL33. I guess I will decide by leakage current, because as I said, it's for a GPSDO, it will be a pretty warm environment.

About the bootstrap capacitor - I was following TI's layout recommendations who are trying to keep the ground loop on the top layer as tight as possible and they probably decided that it's better to break the bottom ground fill rather than cutting off the input caps from the switcher ground on the top layer. I do realize that I am kind of obstructing the ground loop on the top layer with the bootstrap cap, TI recommends a 0603 or smaller footprint here but I hope I can get away with 0805 because that's what I have in my parts bin ;) I stitched the ground side of the output input caps to the ground fill to amend. Now, if the path to the diode anode is more critical than to the switcher ground, I can move the bootstrap trace elsewhere on the bottom layer and put some vias around the anode, too. But I think it's probably going to be OK as it is.

Regarding minimizing the switching node area - good idea, I'll shuffle L201 around a bit and tighten up the copper fill.

Regarding the density of the board - I usually try to make the layout as tight as possible, too, but I will have to assemble them. I have to make amends for that ;)

Voltage spike created by inrush current - ok, I'll think of something here. Leaning towards a TVS diode, actually.

EMI suppression - I hoped that the input caps would take care of that. But I'll add an inductor here.

Another question - should I move C205 over to the other side?
« Last Edit: November 06, 2019, 04:12:53 pm by thinkfat »
Everybody likes gadgets. Until they try to make them.
 

Offline T3sl4co1l

  • Super Contributor
  • ***
  • Posts: 22436
  • Country: us
  • Expert, Analog Electronics, PCB Layout, EMC
    • Seven Transistor Labs
Re: Question on buck converter layout
« Reply #5 on: November 07, 2019, 03:47:25 am »
C205 other side of what?  To the right (where C204 is right now..?), or bottom layer?

The flanking arrangement as shown is very good, but that advantage is also not very important if you're adding on an LC filter (which will provide so much more filtering).

I would guess changing C204 to the inductor, and moving C204 up and right of where it is, would do.  So C204 would be the cap on the connector, and C205 would be on the regulator alone, which might be a little lonely so maybe add another in parallel with C205, just wherever you can fit it, maybe beside C205.  (So, actually move C204 there, and add the new cap and inductor in the other locations... but, yeah, you get the idea, right?  Okay maybe not, descriptions are always so hard to follow..)

Nothing wrong about bottom side by the way, just that you need to add an assembly step.  You do incur the length of the via as additional trace length, but again, this isn't a critical case, it won't matter.


One other thing I forgot to mention about layout, the switch node should preferably be kept small -- it emits some electric field, along with the components attached to it, so minimizing its area helps reduce that method of emission.  I would compromise between emission and thermal performance -- really, just shrink the bottom edge of the polygon so it's closer to the inductor and diode pads.  That still leaves plenty of area to sink heat from those components into the board, and the area isn't much larger than the components themselves, which would dominate anyway if you made it any smaller, i.e. that would be in the range of diminishing returns.

I did a design last year that had a boost converter of similar size, where the switching node (copper area) was smaller than the transistor, inductor and diode combined.  It ended up running afoul of an emissions test, though it was an unusual automotive standard that is exceptionally sensitive (a near E-field test, using a preamplified whip antenna 1m away).  We shrugged and just covered it with a damn RF shield, that was that.  You'll probably never have to worry about this for commercial (let alone noncommercial :) ) purposes.

So, this is a tiny tweak, and probably not even a substantial one.  Just something to keep in mind if you ever get into such a situation. :-+

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 

Offline thinkfatTopic starter

  • Supporter
  • ****
  • Posts: 2161
  • Country: de
  • This is just a hobby I spend too much time on.
    • Matthias' Hackerstübchen
Re: Question on buck converter layout
« Reply #6 on: December 07, 2019, 04:00:11 pm »
I meanwhile completed the design, picture shows a partially assembled prototype powering a Symmetricom UCCM module. Power supply works fine, ripple on the output voltage is around 10mV RMS. Just the poor ES2B directly after the power plug gets a bit toasty while the OXCO warms up. Draws around 1A then. But nothing else gets hot, which is a good sign. Thanks to all for the help!
Everybody likes gadgets. Until they try to make them.
 
The following users thanked this post: Sparky

Offline Sparky

  • Frequent Contributor
  • **
  • Posts: 462
  • Country: us
Re: Question on buck converter layout
« Reply #7 on: January 07, 2020, 03:52:58 am »
I meanwhile completed the design, picture shows a partially assembled prototype powering a Symmetricom UCCM module. Power supply works fine, ripple on the output voltage is around 10mV RMS. Just the poor ES2B directly after the power plug gets a bit toasty while the OXCO warms up. Draws around 1A then. But nothing else gets hot, which is a good sign. Thanks to all for the help!

Excellent approach!  I love how you are using the FPC cable to route all the signals directly to your adapter board with the power supply, instead of using an "FPC breakout" adapter.  I am doing something almost identical but using an LDO for power supply instead of the switcher.  I sent my test board to JLCPCB for fabrication a few days ago and I'll use it to check the UART/RS232 signals -- I'm still unsure exactly which signals are needed.  I plan to follow with a larger board that the GPSDO can attach with its shield in place just as you have done.  (I have the same Symmetricom GPSDO with shield from eBay.)

Would you mind to share the dimensions/hole locations/FPC connector location (and part number) for the bottom board?  I'd really appreciate it and it would save some time.  I am using KiCAD for my board design and happy to share my approach.
 

Offline thinkfatTopic starter

  • Supporter
  • ****
  • Posts: 2161
  • Country: de
  • This is just a hobby I spend too much time on.
    • Matthias' Hackerstübchen
Re: Question on buck converter layout
« Reply #8 on: January 07, 2020, 10:22:50 am »
I meanwhile completed the design, picture shows a partially assembled prototype powering a Symmetricom UCCM module. Power supply works fine, ripple on the output voltage is around 10mV RMS. Just the poor ES2B directly after the power plug gets a bit toasty while the OXCO warms up. Draws around 1A then. But nothing else gets hot, which is a good sign. Thanks to all for the help!

Excellent approach!  I love how you are using the FPC cable to route all the signals directly to your adapter board with the power supply, instead of using an "FPC breakout" adapter.  I am doing something almost identical but using an LDO for power supply instead of the switcher.  I sent my test board to JLCPCB for fabrication a few days ago and I'll use it to check the UART/RS232 signals -- I'm still unsure exactly which signals are needed.  I plan to follow with a larger board that the GPSDO can attach with its shield in place just as you have done.  (I have the same Symmetricom GPSDO with shield from eBay.)

Would you mind to share the dimensions/hole locations/FPC connector location (and part number) for the bottom board?  I'd really appreciate it and it would save some time.  I am using KiCAD for my board design and happy to share my approach.

Let me check, I have a drawing where I measured out the positions of the connector and the holes. I've attached a DXF, you should be able to import it into Kicad and use it as a template for the hole positions and the FPC. I've marked the position of pin 1 of the FPC connector with a small line. The dimensions didn't plot for whatever reason, but if you overlay this graphic onto your PCB you should be OK.

PS: I would not use a linear regulator. The module draws a lot of power while heating the OCXO. You're limiting yourself to a pretty small input voltage range, maybe 6 to 7 volts. Decent cooling required.
PPS: MPN for the FPC connector: Molex 54132-5033. You can order it from Mouser.
« Last Edit: January 07, 2020, 10:30:18 am by thinkfat »
Everybody likes gadgets. Until they try to make them.
 
The following users thanked this post: Sparky

Offline Sparky

  • Frequent Contributor
  • **
  • Posts: 462
  • Country: us
Re: Question on buck converter layout
« Reply #9 on: January 07, 2020, 10:16:55 pm »
Let me check, I have a drawing where I measured out the positions of the connector and the holes. I've attached a DXF, you should be able to import it into Kicad and use it as a template for the hole positions and the FPC. I've marked the position of pin 1 of the FPC connector with a small line. The dimensions didn't plot for whatever reason, but if you overlay this graphic onto your PCB you should be OK.

PS: I would not use a linear regulator. The module draws a lot of power while heating the OCXO. You're limiting yourself to a pretty small input voltage range, maybe 6 to 7 volts. Decent cooling required.
PPS: MPN for the FPC connector: Molex 54132-5033. You can order it from Mouser.

Super helpful!  :)   Thank you so much!  Yes, I'm a little worried about the high current and heat dissipation.  The LDO I selected was LMS1587 and the input will be 9V 2A supply (hard to find ~7-8V adapter).  My simple test board is to evaluate the LDO.  If it doesn't work I will change to something else.
 

Offline thinkfatTopic starter

  • Supporter
  • ****
  • Posts: 2161
  • Country: de
  • This is just a hobby I spend too much time on.
    • Matthias' Hackerstübchen
Re: Question on buck converter layout
« Reply #10 on: January 07, 2020, 11:19:46 pm »
Let me check, I have a drawing where I measured out the positions of the connector and the holes. I've attached a DXF, you should be able to import it into Kicad and use it as a template for the hole positions and the FPC. I've marked the position of pin 1 of the FPC connector with a small line. The dimensions didn't plot for whatever reason, but if you overlay this graphic onto your PCB you should be OK.

PS: I would not use a linear regulator. The module draws a lot of power while heating the OCXO. You're limiting yourself to a pretty small input voltage range, maybe 6 to 7 volts. Decent cooling required.
PPS: MPN for the FPC connector: Molex 54132-5033. You can order it from Mouser.

Super helpful!  :)   Thank you so much!  Yes, I'm a little worried about the high current and heat dissipation.  The LDO I selected was LMS1587 and the input will be 9V 2A supply (hard to find ~7-8V adapter).  My simple test board is to evaluate the LDO.  If it doesn't work I will change to something else.

Oi, that's going to burn. For one, 2A is not enough, you'll need in the area of 2.2 to 2.5A during warm up. Second, you're looking at around 8W to 10W power dissipation, i.e. waste heat. That's a lot. I'd make up my mind about the thermal design. You'll need a good sized heatsink, rated at least 4°C/W or better to keep it below 60°C (assuming 20°C ambient temperature). Those do exist for TO-220 packages so you can definitely pull that off, but they're, like, really chunky! You can of course run the thing hotter, just keep in mind that the junction-to-case thermal resistance is in the area of 2.5°C/W, so the die will be 25°C hotter than the heat sink for sure.
Everybody likes gadgets. Until they try to make them.
 
The following users thanked this post: Sparky

Offline Sparky

  • Frequent Contributor
  • **
  • Posts: 462
  • Country: us
Re: Question on buck converter layout
« Reply #11 on: January 08, 2020, 04:49:40 am »
Oi, that's going to burn. For one, 2A is not enough, you'll need in the area of 2.2 to 2.5A during warm up. Second, you're looking at around 8W to 10W power dissipation, i.e. waste heat. That's a lot. I'd make up my mind about the thermal design. You'll need a good sized heatsink, rated at least 4°C/W or better to keep it below 60°C (assuming 20°C ambient temperature). Those do exist for TO-220 packages so you can definitely pull that off, but they're, like, really chunky! You can of course run the thing hotter, just keep in mind that the junction-to-case thermal resistance is in the area of 2.5°C/W, so the die will be 25°C hotter than the heat sink for sure.

Oh, 2.5A... that's a bit higher than I was thinking.  I thought it was closer to 1.5A during heating and dropping to just below 1A in normal operation.  It does sound like I need to revise the design.

May I ask which switcher you used so I can review its spec's; that would be a help to know what has performed well.  Thanks! :)
 

Offline thinkfatTopic starter

  • Supporter
  • ****
  • Posts: 2161
  • Country: de
  • This is just a hobby I spend too much time on.
    • Matthias' Hackerstübchen
Re: Question on buck converter layout
« Reply #12 on: January 08, 2020, 05:25:33 am »
The info is in this thread, you could use a LM2596 or LM2676 instead as well.
Everybody likes gadgets. Until they try to make them.
 
The following users thanked this post: Sparky

Offline thinkfatTopic starter

  • Supporter
  • ****
  • Posts: 2161
  • Country: de
  • This is just a hobby I spend too much time on.
    • Matthias' Hackerstübchen
Re: Question on buck converter layout
« Reply #13 on: January 08, 2020, 05:40:10 am »
You could also take into account that the gpsdo will only require maximum power for one or two minutes and choose a heatsink with just enough thermal capacity to keep the temperature low enough to survive that. Might involve solving a differential equation, though.
Everybody likes gadgets. Until they try to make them.
 
The following users thanked this post: Sparky


Share me

Digg  Facebook  SlashDot  Delicious  Technorati  Twitter  Google  Yahoo
Smf