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Do I really need two FETs in parallel to handle the current and heat?
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Maybe, maybe not. If the FETs are mounted onto the board - and therefore relying on it for a heatsink - then yes, you might need 2 or more in parallel to limit the temperature rise to less than 75C or so because the total thermal resistance from junction to ambient will be quite high.
For example, the last FET on your list - SQR97N06 - has a R_theta[j-a] of 50C when mounted on a 25mm x 25mm square of copper on a PCB - a rather large chunk of board area, all things considered - which means it will only take 1.5W of dissipation for a 75C rise. With an Rds[on] of around 90-95 milliOhms at 100C (never use the 25C rating!) you'll hit the dissipation limit at ~4A... No, that isn't a typo. Now let's say you are willing to push the junction temperature up to 125C - not really advisable unless it is a SiC MOSFET, and even then I'd think twice - then you would be allowed a whopping 2W of Pd but because Rds[on] goes up with temperature it will now be 117mΩ so you only get another 130mA of current rating for cutting lifespan by a good 4x (from Arrhenius: every 10-11C rise in temp cuts life in half).
Hence for board mounted FETs the spec to focus on is Rds[on], and using Ohm's Law - R = P / I
2 - with an allowed Pd of 2W, an R_theta[j-a] of 50C/W and a current of 20A you'll see you need a max Rds[on] at 100C of 5mΩ. What you'll likely find is that a single device that meets these specs will be more expensive than two or even three "worse" devices in parallel, hence the original recommendation. If you insist on going the single device route then consider the D2Pak (TO-263) as it has a lower overall thermal resistance with approximately the same board area used as a heatsink (typically 40C/W).
Finally, if the max battery voltage is <30V then a 50V Vds rating will be fine, and since Rds[on] goes up with voltage rating that is a strong incentive to not go too crazy here.
EDIT - forgot to specify R_theta[j-a] in last example.