Dear all:
Many thanks for your help! I will reply individually below:
Yes, opamp circuits have this limitation.
I'd guess a proper way to avoid deviations is to bandwidth-limit the input signal to a bandwidth where the opamp can still work well. There are many ways to do it. To implement a low pass you could divide the integrator input resistor in two and use a capacitor from their middle point to Gnd. Thus you combine a fast passive integrator with a slow active integrator, if you want so. I didn't simulate it, but it should work well.
Regards, Dieter
Dieter I think this is the way to go! I was already experimenting with placing a passive low pass filter to compensate for the opamp finite GBW, but now I can more aggressively reduce the bandwidth with the passive filter first and add a zero in the opamp circuit, which at high frequencies would effectively work then as an inverting amplifier. Initial simulations are promising and while I need to figure out the many details along the way this is very interesting. Thanks!
You could have a look at Deboo integrators. They avoid the problem at the cost of some more resistors.
https://www.analog.com/en/resources/technical-articles/consider-the-deboo-singlesupply-integrator.html
Jbb, I was aware of Deboo integrators, but the reason why I need an inverting configuration is because eventually I will need to add and integrate many identical signals. While in principle I see that adding signals can be done with a non-inverting integrator, the lack of a virtual ground makes me sceptical of possible “crosstalk” between inputs.
Fast integrators often use that configuration, and there are even better ways. An operational transconductance amplifier can drive a capacitor directly to make a very fast integrator. The integrator in a fast function generator uses switched voltage controlled current sources, with the switching taking place at the current outputs which can be very fast with little disturbance.
I have seen capacitance added in a network at the input to an operational integrator to improve precision, and I have done it, but it always seems like a race against the devil.
David Hess, you have come very close to the present prototype! I currently have an OPA860 connected as a common base which adds the input currents and are then integrated into an output capacitor. DC stabilization of the network is not trivial, but besides that, the issue is the relatively high current noise of the OTA at 1 kHz.
I have considered designing my own bipolar common base stage, but then you run at the classical tradeoff of Zin vs current noise, which I can’t really afford (since I need the very low Zin to add the signals in the first place). Furthermore, the value of the input resistor is a compromise between low enough to have high gain and high enough to no be affected by the finite Zin of the topology.
It is true that open loop designs do not have to worry about preshoots and other errors caused by loop dynamics but I have been rudely remembered why feedback is so important when trying to exploit those advantages hahaha
Once again, thanks to all for the discussion!