Author Topic: remove dc offset from signal going into an op amp  (Read 3421 times)

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Offline beandigitalTopic starter

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remove dc offset from signal going into an op amp
« on: May 16, 2019, 06:03:45 pm »
I have a signal that varies between 19V and 17V @ 250kHz. The signal operates in a burst pattern where it outputs 2048 values then stops for a few ms. I want to input this signal into an op amp and remove the dc level. I have a circuit that has a dc blocking capacitor between the signal and the op amp input. The op amp is set as a buffer, and also has a resistor to ground. So I have a high pass filter on the input of the buffer. The issue I have is that I am finding that the circuit takes a long time to settle if I select values that maintain the signal integrity. If I then change the values to speed up the settling time the signal starts to degrade. Are there any other options that will maintain the signal integrity whilst giving a fast settling time? I am open to using a completely different circuit. Thanks
 

Offline schmitt trigger

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Re: remove dc offset from signal going into an op amp
« Reply #1 on: May 16, 2019, 06:11:33 pm »
What is the time constant of your R-C coupling circuit?

Could you share some scope images of what you see as signal degradation?

During idle, what is the DC voltage value? Is it steady?


Without knowing the answers to the above questions, and with many actual details missing, my first idea would be to have a circuit which would get the average DC voltage integrated for a long time, and apply that voltage to a difference amp which also processes your signal.
« Last Edit: May 16, 2019, 06:14:30 pm by schmitt trigger »
 

Offline ejeffrey

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Re: remove dc offset from signal going into an op amp
« Reply #2 on: May 16, 2019, 06:25:02 pm »
This probably means that your pulse sequences are not DC balanced, or have substantial signal content below the cutoff of your highpass filter.  This causes the capacitor in your RC to charge up and then bleed off slowly.

Is the output during the "idle" periods the DC offset?  If so you can use a sample-and-hold architecture to sample the DC offset only during the idle periods.  Then use an op-amp difference circuit to subtract that from the input signal.
 

Online Marco

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Re: remove dc offset from signal going into an op amp
« Reply #3 on: May 16, 2019, 06:43:31 pm »
How long does it send and how long does it not?  Unless it's not sending for say 10× .more than it is, a capacitor is not the right solution.

The signal presumably has DC even after you remove 18v. So if the steady state of the signal is 17v, it will always try to pull the signal up during the burst.
 

Offline strawberry

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Re: remove dc offset from signal going into an op amp
« Reply #4 on: May 16, 2019, 06:46:58 pm »
offset OP reference input 0V to 17V and amplifie difference

capacitor give error due to PWM average value
 

Offline beandigitalTopic starter

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Re: remove dc offset from signal going into an op amp
« Reply #5 on: May 16, 2019, 07:34:22 pm »
The signal looks like a square wave when its outputting. High (19V) for 2us then low (17V) for 2us. This occurs 2048 times then the output is 17V for about 10ms. I have a 100n capacitor and have tried various resistors, but as I mentioned improving one thing makes the other worse. So I am not sure that this is the right way to go. I need the signal integrity to remain but also have a fast transient response.
 

Offline RandallMcRee

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Re: remove dc offset from signal going into an op amp
« Reply #6 on: May 16, 2019, 07:43:34 pm »
You should try a second order bessel filter.

Googling that will give a lot of information


Sent from my iPhone using Tapatalk
 

Online Marco

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Re: remove dc offset from signal going into an op amp
« Reply #7 on: May 16, 2019, 09:43:51 pm »
The signal looks like a square wave when its outputting. High (19V) for 2us then low (17V) for 2us. This occurs 2048 times then the output is 17V for about 10ms.

Doesn't matter what kind of linear filter you use, that's not going to work. The 10ms it's not sending aren't enough to overpower the 8ms of signal with a variable DC offset.

Assuming the 17V is stable enough, just subtract 17V.
« Last Edit: May 16, 2019, 09:51:36 pm by Marco »
 

Offline StillTrying

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Re: remove dc offset from signal going into an op amp
« Reply #8 on: May 16, 2019, 10:53:43 pm »
The signal looks like a square wave when its outputting. High (19V) for 2us then low (17V) for 2us. This occurs 2048 times then the output is 17V for about 10ms.

Could you apply just the 2V edges to a comparator with about 0.5V hysteresis instead of an op amp.
.  That took much longer than I thought it would.
 

Offline mikerj

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Re: remove dc offset from signal going into an op amp
« Reply #9 on: May 17, 2019, 07:07:39 am »
What exactly do you want to extract from the signal?  e.g. are you just interested in the edges, or do you need to measure the amplitude of the pulses etc?
 

Offline sanwal209

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Re: remove dc offset from signal going into an op amp
« Reply #10 on: May 17, 2019, 08:14:02 am »
You can try DC servo Offset removal circuit or phase lock in amplifier to remove offset.
 

Offline StillTrying

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Re: remove dc offset from signal going into an op amp
« Reply #11 on: May 17, 2019, 11:18:58 am »
What exactly do you want to extract from the signal?  e.g. are you just interested in the edges, or do you need to measure the amplitude of the pulses etc?

That's the vital question, analogue or just digital. If it's just the high/low switching that's needed a 555 run on 5V can be used as the comparator.
.  That took much longer than I thought it would.
 


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