Author Topic: Parallel MOSFET drain source overvoltage protection  (Read 655 times)

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Offline FoxesRuleTopic starter

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Parallel MOSFET drain source overvoltage protection
« on: December 02, 2024, 02:44:07 pm »
Hi everyone :-)

I have attached an equivalent circuit of a low-side active over-voltage clamp for a MOSFET

Source: https://www.diodes.com/design/support/technical-articles/self-protecting-mosfets-deliver-improved-reliability-in-the-harsh-environment-of-automotive-applications/

Focusing on the Zener diode in the figure, it protects the FET as follow:
When the MOSFET is switched off and the voltage of the drain pin rises above the Zener stack voltage, current will flow via the Zener and input resistor to ground. Then, as the resulting voltage generated at the gate of the MOSFET nears its threshold, the MOSFET will start to turn on and draw load current.

This ensures that the inductive energy generated by a deactivating relay is absorbed by the power MOSFET operating in its normal active region rather than dissipating the energy more locally in a reverse avalanche mode. And, since the clamp voltage is lower than the avalanche voltage, the MOSFET dissipates less instantaneous power in clamp mode than avalanche mode providing a greater energy handling capability.

I understand the concept, but my question is if this will still be effective for a MOSFET array in parallel in switching an inductive load in a PWM application.

MOSFET threshold voltage decreases with temperature, so one of the MOSFET's will eventually start running hotter than the rest which will only become worse as time goes on.
However, the avalanche breakdown voltage of an FET increases with temperature, which means without this protection circuit the MOSFETs will essentially "take turns" breaking down as the FET with the lowest temperature will face the breakdown voltage and heat up until there is another FET which is colder which will then "take over".
*This is my thoughts in any case*

Has anyone worked with this particular protection scheme for MOSFET's in parallel and can they perhaps provide guidance or refer me to application notes?

PS: I understand snubbers and flywheel diodes are obviously a must and should be included, but for this post I would like to focus on understanding the mechanisms listed above if possible  :)

Thank you





 

Offline PCB.Wiz

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Re: Parallel MOSFET drain source overvoltage protection
« Reply #1 on: December 02, 2024, 07:59:54 pm »
PS: I understand snubbers and flywheel diodes are obviously a must and should be included, but for this post I would like to focus on understanding the mechanisms listed above if possible  :)
Yes, flyback diodes are essential.

I understand the concept, but my question is if this will still be effective for a MOSFET array in parallel in switching an inductive load in a PWM application.
How many in parallel and what loads ? Parallel mosfets suggest this is not a relay ?

Since the flyback diode does the hard work, such clamp protections are only used rarely, like when a short is released or an ESD event.
For such brief operation, thermal history has little impact.

You could check with spice how much variation is likely across multiple FETs
 
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Online David Hess

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Re: Parallel MOSFET drain source overvoltage protection
« Reply #2 on: December 03, 2024, 03:34:22 am »
The problem is that the MOSFET threshold voltages are not identical, so the ones with the lowest threshold voltages will turn on before others and only those will absorb the energy.  Of course the same applies if the parallel MOSFETs are driven into avalanche because the avalanche voltages will not all be equal.

Solutions include matching the MOSFET threshold voltages so that they all turn on, or adding resistance in series with each source lead to enforce current sharing.  There might be some way to actively correct the threshold voltages with some type of sample and hold circuit, but I have never seen this done for parallel transistors.  It would sure work though if you did it this way.

Active control to enforce current sharing is feasible, like you would with parallel MOSFETs in a constant current load application, but I do not know if it could be made fast enough.  Some of the MOSFETs would probably be driven into avalanche before conduction could start, but there still might be a benefit to this if the cost of the circuit complexity is acceptable.  Driving power MOSFETs into controlled linear conduction as fast as possible is always a fun exercise.
 
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Offline Geoff-AU

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Re: Parallel MOSFET drain source overvoltage protection
« Reply #3 on: December 03, 2024, 05:04:19 am »
MOSFETs optimised for switching applications usually can't handle much active/linear operation, they go through secondary breakdown (a slightly hotter part of the silicon reduces the threshold for that part of the channel, and it attracts more current, decreasing the local threshold further).

In practice, an inductive load will have a fast enough rise time that the gate is yanked well above threshold and switches fully on, thereby avoiding the active/linear area.

For MOSFETs in parallel, if only one of them activates its protection then I'd be concerned about longevity.  The initial flyback current will be the same as the full load current and now that's only going through one device.

Consider adding your own protection that either:
a) eats the spike itself; or
b) kicks in before the built-in FET protection and turns all of the MOSFETs fully on at the same time (a DIAC/SIDAC or a comparator depending on what voltages you're dealing with).

Source resistors for current sharing also kinda important in general.

« Last Edit: December 03, 2024, 05:13:28 am by Geoff-AU »
 
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Offline PCB.Wiz

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Re: Parallel MOSFET drain source overvoltage protection
« Reply #4 on: December 03, 2024, 05:14:14 am »
The problem is that the MOSFET threshold voltages are not identical, so the ones with the lowest threshold voltages will turn on before others and only those will absorb the energy.  Of course the same applies if the parallel MOSFETs are driven into avalanche because the avalanche voltages will not all be equal.

The Zener voltage tolerance is also in play here.  (and Cgs variations and Zener capacitance variations..)

We still do not know what the OP is driving, how many amps, and how often this is expected to clamp, vs normal flyback diode current paths.
 
« Last Edit: December 03, 2024, 05:52:57 am by PCB.Wiz »
 

Online David Hess

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Re: Parallel MOSFET drain source overvoltage protection
« Reply #5 on: December 03, 2024, 12:31:56 pm »
In practice, an inductive load will have a fast enough rise time that the gate is yanked well above threshold and switches fully on, thereby avoiding the active/linear area.

That is not my experience.  I have used that technique with a single power MOSFET and the gate only got pulled high enough to start conduction and clamp the inductive output to the zener voltage plus the MOSFET's threshold voltage with little overshoot.  At the start, the zener diode and input capacitance of the MOSFET clamp the inductive pulse.

Quote
MOSFETs optimised for switching applications usually can't handle much active/linear operation, they go through secondary breakdown (a slightly hotter part of the silicon reduces the threshold for that part of the channel, and it attracts more current, decreasing the local threshold further).

Presumably the energy involved is not enough to overheat the MOSFET even with thermal instability, especially when distributed across multiple MOSFETs.

A big snubber seems like an easier solution.
 


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