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S25FL256 serial Flash Voltage rail sequence
rakeshm55:
Hi ,
I happen to raise a query regarding voltage rail of serial FLASH S25FL256 via this thread in cypress forum
https://community.cypress.com/thread/45499
thread response specified using system 1.8V for pullups input pins.
Data sheet: https://www.cypress.com/file/448601/download
For S25FL256 VIO volatge can be 1.8V or 3.3V and I want to operate VIO in 1.8V. It also has a sequencing requirement VIO should follow VCC. Since my system voltage rail does not follow this sequence I have used a separate LDO to generate the voltage needed.
The Input pin voltages have an absolute max specification of
""Input voltage with respect to Ground (VSS):: ( –0.5V to +(VIO + 0.5V)).....
My query was which voltage rail I need to pull up input pins to....If the response is correct then how this absolute max rating is surmounted...please help
rakeshm55:
Attached is the schematics page
SiliconWizard:
--- Quote from: rakeshm55 on October 27, 2019, 05:57:41 am ---The Input pin voltages have an absolute max specification of
""Input voltage with respect to Ground (VSS):: ( –0.5V to +(VIO + 0.5V)).....
My query was which voltage rail I need to pull up input pins to....
--- End quote ---
To VIO, what else?
--- Quote from: rakeshm55 on October 27, 2019, 05:57:41 am ---If the response is correct then how this absolute max rating is surmounted...please help
--- End quote ---
I may have missed something, but how would pulling up to VIO violate the specs?
rakeshm55:
Hi,
""signals HOLD, WP and CS to power rail B_1V8_D. ""
Is the response I received ...
B_1V8_D is system supply voltage and not VIO....
VIO is sequenced after VCC where as B_1V8_D is sequenced before VCC.... So for a short period I guess input pins will be raised above VIO... This is my concern
SiliconWizard:
They may have gotten confused by your multiple 1.8V rails.
As I said, I would personally pull up to VIO, which after looking at your schematic would be B_1V8_SF.
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