Improving rise time

[Pack34]

I have an odd issue with distortion on a high-frequency digital signal. The attached scope shot shows two complimentary clocks. I'm concerned with the rise time on the green signal.

Both simply have a 15-ohm series resistor leading to the input gate on the destination. The cable is about six inches long.

The device seems to be functioning as expected, but I just don't like the way that it looks. It makes me feel that this "working" may be a fringe case and that, in volume, the device will not function a good percentage of the time.

The signal is a -8V to 3V clock originating from a MAX627 MOSFET driver. I'm using this driver as a level shifter due to the required negative voltage swing.

Any tips?

[Audioguru]

I cannot see the settings of your 'scope. It is 500ns per division so the risetime is a whopping 800ns? the datasheet for the driver says 20ns with a 1000pF load so your Mosfets have an input that is about 40,000pF. Get Mosfets with a lower input capacitance or a driver that can switch what you have faster.

[Someone]

Driving some large mosfets? Looks just like you'd expect as you pass the threshold voltage:
http://www.st.com/content/ccc/resource/technical/document/application_note/68/cd/c6/ab/ef/17/41/06/CD00003900.pdf/files/CD00003900.pdf/jcr:content/translations/en.CD00003900.pdf

[Pack34]

Input capacitance is rated at only 800pF.

[ScottK]

You are witnessing the "Miller plateau", caused by the amplification of the MOSFETs Cgd by the apparent voltage gain from gate to drain. I suspect you see it only at turn-on because your maximum gate drive voltage (3V) is closer to the MOSFETs Vth than your minimum drive voltage (-8V), so you are turning the MOSFET off harder than you're turning it on. It's also possible that your load doesn't pull the drain up until after the gate drive goes low. You only see the Miller effect if the drain voltage is changing.

Google "Miller effect" and/or "Miller plateau" to learn more.

[David Hess]

The waveform is wrong for a 6 inch transmission line or cable so something else is going on.

Is the MAX627 decoupled correctly at its supply terminals?

What is the ground return path for the cable like?

[T3sl4co1l]

What a peculiar voltage.

GaN FET?

Tim

[Pack34]

You are witnessing the "Miller plateau", caused by the amplification of the MOSFETs Cgd by the apparent voltage gain from gate to drain. I suspect you see it only at turn-on because your maximum gate drive voltage (3V) is closer to the MOSFETs Vth than your minimum drive voltage (-8V), so you are turning the MOSFET off harder than you're turning it on. It's also possible that your load doesn't pull the drain up until after the gate drive goes low. You only see the Miller effect if the drain voltage is changing.

Google "Miller effect" and/or "Miller plateau" to learn more.

Yes! Thank you!