| Electronics > Projects, Designs, and Technical Stuff |
| Sencore USB Interface Project |
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| coromonadalix:
The 8243 was made to work with these cpu in a bidirectional fashion ... thats why we dont see any substitue for it, not sure the ported vhdl equivalent chip would work well in this case ?? And the 8250 who act as a fifo / buffer must help. At 19200 bauds around year 1990, must have been a accomplishment lol ?? My test board would be an bluepill with the 8243 like i saw on his prototype, add a small 5vdc to 5vdc isolated dc-dc converter, do some tests at 9600 bauds and / or 19200 bauds, no protection added for now (cheap and dirt mode loll) and later just add an usb isolator on the usb line. The 4 poles relay we see, must be activated by the rs232 line, or maybe by the LC102 dtr dsr rqs cts not sur if its work in dte dce ... dce dte mode etc ... Willing to be a guinea pig, i just need a code to compile or dump, i have an st programmer ready loll |
| Renate:
The middle trace in that diagram is when the MCU is writing, so of course there is no conflict. The bottom trace is MCU writing, then 8243 writing, i.e. a read. The 8243 responds as quickly as it can to the falling PROG, tACC=650ns max Since the data hold on the MCU has a minimum of 20nS there should be plenty of elbow room. I just hate the waste of expanding a nibble to 16 bits that you have to stick back into a uP. Silly idea: You could get a little uP, run it in a tight, no interrupts loop and have it spit out the data on SPI to its big brother. |
| pigrew:
Ok... Design attempt number 4? I got rid of the 8243, replacing it with a FPGA. I added an earthed STM32f042 MCU to do the USB->UART interfacing. I'm a little bit unsure of all of the bus drivers, or how much extra capacitance I'm adding to the bus (though shouldn't be much more than the IB78 itself). I'm using a bus driver which has two enables, one for nPROG and the other for the signal from the FPGA, which should help avoid any spurious writes to the bus. I'm somewhat worried that I chose the wrong logic families for the bus I/O? (bus is 5V, CMOS levels). The MCU and FPGA are both 3.3V. I'll probably end up running the UART at 100 or 250 kHz. I also found out that I've been doing micro-USB ports the wrong way. Standard micro-USB connectors are "bottom-mount", but based on the enclosure I really need a "reverse" top-mount connector. I guess people are supposed to put the USB transceiver on the bottom of the board, so the USB tracks don't need to via up or down. I also would have rathered an integrated USB line filter+ESD package, but I couldn't find any without an internal pullup, so I'm using a 5-pin TVS package, and external series termination resistors. |
| coromonadalix:
I would ditch all esd protection, an direct dc supply line from the dc-dc, no USB Soft-start, OVP, OCP circuit, just an good reset line. Maybe i would add an 9600 baud and the 19200 baud selector, many serial to usb port are at 9600 bauds "default" until you crank it up to 115200. Unless there is some baud detection implemented ??? Not for a low parts count, but i do think its a little too much, your protection is added with the small dc-dc converter and an usb isolator. We use SMS05C protection ic's around our ATF1504 cpld design, no speed or capacitances issues. https://www.onsemi.com/pub/Collateral/SMS05C-D.PDF And we use TXB0108 voltage translation ic's in our embedded boards. https://cdn-shop.adafruit.com/datasheets/txb0108.pdf Just received my IB78, same eeprom version than yours, and i got an usb rs232 optoisolated db25 adapter who go nicely on the box, it has an micro dc-dc converter in it. Jus battling with the IB78 dc plug, too deep for my taste, will connect it to the lc102 and see ... with an window terminal how it goes. An idea would be to add a suplemental pin in the din plug for the IB78 supply power ... i put an 18v 3.46 amp laptop adapter on my lc102, enough power to do, and it does 100-250 vac line ;) |
| pigrew:
Anther question is the FPGA to bus transceivers. I noticed that there are bidirectional bus I/O chips like TXS0108E (5.5 pF) or like SN74LVC8T245 (8.5 pF). It would save four pins on the FPGA to use them, but there the FPGA has enough pins already.... These are about equal capacitance to the existing solution of a receiver and a transmitter IC (4 pF + 2 pF), though there would be less parasitic capacitance. My plan would be to continue as I've posted. ADDITION: The TXS0108E and TXB0108 are bad ideas due to the high bus capacitance of the meter+IB cable. --- Quote from: coromonadalix on August 23, 2019, 05:50:49 pm ---I would ditch all esd protection, an direct dc supply line from the dc-dc, no USB Soft-start, OVP, OCP circuit, just an good reset line. An idea would be to add a suplemental pin in the din plug for the IB78 supply power .. --- End quote --- Regarding ESD, I'd like to at least keep the pads on the PCB, but feel free to not populate them if you prefer living dangerously. :) ANOTHER ADDITION: Maybe we the FPGA is low power enough that we can parasitically draw power from the I/O lines? (I'm mostly joking) EDIT #3: Apparently the STM32 has built-in series termination resistors, so the 22 ohm ones need to go away (or be populated with shunts). STM32L0x2 would be another good choice of STM32, but no huge benefit in this application (that I know of). |
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