Over current protection with FET: How to switch off load?

[superKris]

I'm trying to make a over current protection. This situation is simplified a bit, but basically i want the schematic to turn the FET off, when te load exceeds a certain current. However, when the load is below its threshold again i want it to start conducting again.

I understand that in order to know if the load is not below its threshold, i need the FET to turn on first so the current can be measured. In my situation this is acceptable. Lets say i want it to switch of for 5 seconds when there was a over current for 0,5 seconds or more.

Attached is some basic schematic i'm working with. I tried a lot of stuff behind the comparator including RC timers, additional compactors, etc. 

Everything i try ends up in the same result: The FET lowers the output so the current is limited to the set value. The problem with this is that i would need a big FET with lots of cooling. 3A and a voltage drop of 10V is 30 watts of power!

Every schematic that i found works with a reset switch, uses specialized IC's, Relays, etc. but i dont want any of these solutions.

Can anyone point me in the right direction? Or am i trying to do something that is actually pretty complicated and should really be done with specialized IC's?

[Peabody]

So is the heat issue the only one that prevents you from using a current limiting circuit, or is there another reason why you want to shut it down completely and then power up again and test it? Heat would need to be dissipated only to the extent the current is being limited, so it might not be all that great unless we're talking about a dead short across the load.

Anyway, I don't know of a circuit that works as you've described.  Here's a Jerri Ellsworth video of a circuit that behaves pretty much like your posted circuit does.



Maybe if you could describe a bit more about what might lead to the excess current somebody will have a solution.  Also, don't forget that a little 8-pin MCU dedicated to this might take the place of a lot of latches and timers and such, and you could have it do whatever you want.

[2N3055]

Search terms:

foldback current limiting
electronic fuse

[T3sl4co1l]

Ah yes, you've hit the first fundamental problem with "talking through" a solution -- a comparator is a boolean proposition, "if [current is over threshold] then [turn off switch]" -- but then what happens, current stops so the switch turns instantly on again?  What was the point?

The problem ends up terribly under-defined.  What should happen, in every possible state?

The two directions you can go, are to introduce continuity -- that is, use a continuous, analog response -- or to introduce internal state or the concept of time.  Or preferably several.

We can add to the statement, for example:
If [current is over threshold] then [set timer]
If [timer is set] then [turn off switch and wait]
If [time out] then [clear timer and turn on switch]

This implies a flip-flop, i.e. the switch state remains where it is until changed by events.  We can easily synthesize this with a pair of NOR or NAND gates, and a 555 timer, say.

Note that we could just as well omit the timer, and use a reset button instead -- then we have a manual-reset circuit breaker of sorts, versus the self-resetting kind.

The analog version would limit current rather than disable the output entirely; as a control loop, it must take into account some internal state, which is the node voltages, their capacitances, and anything else (the load might be reactive by itself).


The simplest possible solution, from where you are now, is to add positive feedback around the comparator (making the comparator itself into a primitive flip-flop -- voila, internal state!).  A resistor divider from OUT, to +IN, to VREF, sets rising and falling thresholds; use a capacitor in parallel with the feedback resistor to enforce a time delay.

Tim

[ejeffrey]

You need to be driving the mosfet with a digital signal not an analog ramp to make sure the switch is always fully on or off.  Otherwise you have made a regulator not a switch.  One basic approach would be a comparator to detect overvoltage which triggers a 555 in one shot multivibrator configuration for the 5s timeout. 

[MarkF]

You need to be driving the mosfet with a digital signal not an analog ramp to make sure the switch is always fully on or off.  Otherwise you have made a regulator not a switch.  One basic approach would be a comparator to detect overvoltage which triggers a 555 in one shot multivibrator configuration for the 5s timeout.

You should probably lookup the LM393 part number.   

[superKris]

Thank you all for taking the time to reply!

So is the heat issue the only one that prevents you from using a current limiting circuit, or is there another reason why you want to shut it down completely and then power up again and test it? Heat would need to be dissipated only to the extent the current is being limited, so it might not be all that great unless we're talking about a dead short across the load.

Anyway, I don't know of a circuit that works as you've described.  Here's a Jerri Ellsworth video of a circuit that behaves pretty much like your posted circuit does.


Maybe if you could describe a bit more about what might lead to the excess current somebody will have a solution.  Also, don't forget that a little 8-pin MCU dedicated to this might take the place of a lot of latches and timers and such, and you could have it do whatever you want.

I'm building the circuit to switch of at either 1A or 3A, depending on the how much current there is, the FET wil create the voltagedrop needed to reach the desired current. This could be for example 6V. That's a lot of power to burn, especially if you not panning on using large components.

I have watched the video but it pretty much describes the problem i'm having but without fixing it. Thanks anyway.

Search terms:

foldback current limiting
electronic fuse

I did a whole lot of googling on those. A interesting read, but wasn't really able to find a "simple" schematic that does what i want. However in the schematics i saw, i did find a couple that use SCR's as a basic "memory" that keep the FET of. I tried to impement this in my schematic. I do think the behavior of the SCRs is a bit unpredicable (in sim) but i basicaly got it working so thank you!

Attached is the schematic so far...

I now just need to build some RC timer that feeds into a 2nd comparator that does something to turn off the SCR again.

The simplest possible solution, from where you are now, is to add positive feedback around the comparator (making the comparator itself into a primitive flip-flop -- voila, internal state!).  A resistor divider from OUT, to +IN, to VREF, sets rising and falling thresholds; use a capacitor in parallel with the feedback resistor to enforce a time delay.

I'm not totally sure what you mean, but it sound like you know what you are talking about. I'll try to do what you suggest!

[T3sl4co1l]

You need to be driving the mosfet with a digital signal not an analog ramp to make sure the switch is always fully on or off.  Otherwise you have made a regulator not a switch.  One basic approach would be a comparator to detect overvoltage which triggers a 555 in one shot multivibrator configuration for the 5s timeout.

You should probably lookup the LM393 part number.   

Build the circuit with a real LM393 and show us what the gate waveform looks like.

Tim

[David Hess]

Positive AC feedback around the comparator is required to hold the output off for a minimum amount of time.

Often instead of combining the functions, the comparator trips a separate monstable multivibrator which holds the output off for a specific time.

[superKris]

Thank you all!

By now i feel most of you are absolutely right that a comparator with hysteresis and a monostable multivibrator is probably indeed the best option. I attached my schematic. It works in sim, but i would love your feedback anyway.

A couple of things i noticed:
- My zener voltage reference was not compatible with the feedback resistor resistor. I had to remove it, but for my application i guess a regular voltage divider is acceptable.
- I was not able to to place the feedback resistor to the input on the negative input of the opamp. (i'm new to adding hysteresis to comparators)
- I also was not able to connect the positive input with the feedback resistor to the shunt. Because the 555 triggers on negative edge i had to use a transistor to invert the comparator output.
- This system triggers VERY fast when a over current happens. This can be a problem for capacitive loads which WILL be pressent. Therefore i need a delay before it triggers. R11,C4, D1 and R12 take care of this. The delay is appox. 30ms.

So my main questions are:
1) Do you think my schematic is optimal, or should i improve things? Am i still at risk the FET will go into the linear region?
2) Did i get the hysteresis right, or should i adjust the feedback resistor?
3) What do you think about my solution for the inrush current. Any ways to improve this? Maybe without a zener?
4) What is sensible time for the circuit to wait before it triggers?

Basically the circuit should trigger at currents above 1A. High currents are allowed up to 30ms. The circuit retries after 1 second.

I would highly appreciate your feedback!

[Mechatrommer]

it seems its getting out of hand... i think you dont need 555 vibrator, why dont you sim back the comparator with hysteresis as Tim suggested? into your original drawing? choose Rh appropriately so hysteresis threshold (swing between on and off) is as desired and Ch to give the right time constant.. ymmv.

[Alti]

Basically the circuit should trigger at currents above 1A. High currents are allowed up to 30ms. The circuit retries after 1 second.

Use uC. I think even PIC10F204 is capable of servicing this kind of state machine job, comparator on-board.

[T3sl4co1l]

A couple of things i noticed:
- My zener voltage reference was not compatible with the feedback resistor resistor. I had to remove it, but for my application i guess a regular voltage divider is acceptable.

The zener is fine, you don't need the cap.  If it's noisy, so what, it'll randomly trigger at a slightly higher threshold, just tweak the resistor divider by the same margin to get the same DC value.

BTW, low voltage zeners are terrible voltage regulators anyway, not much better than a diode junction.  Looks like that "3.3V" zener is dropping only a volt?  No, it's worse than that, it's not conducting at all, the divider to the zener is only making a volt...

You'd have to change R5 to about 470, to get the specified voltage (1N5226 rated 3.3V at 20mA).

For a fuse sort of thing, I'd be fine with a diode junction, with dividers set so it meets the minimum threshold at maximum operating temperature (diode Vf varies inversely with T, so it'll also handle more current at low temperatures...which maybe isn't a bad thing anyway?).  Next step up from that is a luxurious band gap voltage reference, such as TLV431 -- accurate within a few percent, but still pretty cheap.

Or, if your supply is stable (maybe a 12V switching supply, or a battery), the bare divider really isn't going to be much of a problem.

- I was not able to to place the feedback resistor to the input on the negative input of the opamp. (i'm new to adding hysteresis to comparators)

Duh, put a series resistor between shunt and comp pin.

- This system triggers VERY fast when a over current happens. This can be a problem for capacitive loads which WILL be pressent. Therefore i need a delay before it triggers. R11,C4, D1 and R12 take care of this. The delay is appox. 30ms.

Hmm, again the 1N5226 won't do much, and it would be helpful to have some biasing on it, and also some turn-off current -- both served by a B-E resistor on Q2.

The sucky part is, you need a high resistance for the divider, to get a reasonable time constant without loading the output (which only has R8 pulling it up).  So the B-E resistor can't be much, and you can't get more than a tiny amount of bias through the zener.

If you don't mind that the delay is temp dependent, just set the R11-R12 divider for 1-1.5V (assuming no D1/Q2 load) and use the BJT's Vbe as threshold, no zener needed.  (Again, it's inversely proportional to T, same as diode Vf.  So, it'll be shorter delay at high temp... which again seems maybe actually useful?)

Oh, also supply dependent, in much the same way as the threshold divider is.  You could mitigate that by clamping the comparator's "high" level -- a 1N5231 from GND to pin 1, say.  This changes the hysteresis band, so adjust the feedback resistor as well.

So my main questions are:
1) Do you think my schematic is optimal, or should i improve things? Am i still at risk the FET will go into the linear region?

Optimal in what sense?  You've provided very few specifications for this; if "optimal" is "it works", I think you've struck it, but it is a rather wide target.

3) What do you think about my solution for the inrush current. Any ways to improve this? Maybe without a zener?
4) What is sensible time for the circuit to wait before it triggers?

Basically the circuit should trigger at currents above 1A. High currents are allowed up to 30ms. The circuit retries after 1 second.

Well I guess you answered your own question -- is that a new specification, 30ms overload tolerance?

Also if it's fully 30ms, why not use -- *drumroll* -- a polyfuse?  Far higher energy handling than the MOSFET, and will take about that much time to open.

Regarding the transistor, https://www.infineon.com/dgdl/irf7404pbf.pdf?fileId=5546d462533600a4015355fa31be1ba0 Fig.8 SOA shows full current handling for 10ms, up to only 2V.  So it would seem you will need a considerably larger transistor to handle complete short-circuit conditions.

Quite possibly, your supply won't even be able to maintain its output under such loads, in which case Vgs(on) will even drop during the fault (which can help limit current, but again puts the transistor in its linear range?).

So, the problem is poorly specified -- you need source characteristics, load characteristics, response time, what kind of peak currents are allowable under which conditions, etc.

It can be practical to design load switches with a relatively high Rds(on), so that peak fault current is limited by the transistor, and the transistor has a relatively large tab compared to its peak power rating, so that it's able to survive it.  Example, 12V * 100mA = 1.2W, easily handled by a SOT-89 or SOT-223 part; 12V / 100mA = 120 ohms, which you aren't going to find in an Rds(on) in a transistor that size, but a current limiting circuit (like a "ring of two" type) would do a fine job, or a depletion mode MOSFET could be used (which can limit current passively by itself; downside, they're harder to turn off, requiring negative bias).

Whereas with a very low Rds(on) and a small package, like the 40mohm SO-8 shown above, the peak fault current up to 27A or so (essentially the pulsed drain current) has basically no hope of survival, for any length of time (evidently, around 200us).

Oh, also, the situation is a little better due to the current shunt, which acts as source degeneration here.  Hm, at 27A, the 50mohm is only dropping 1.35V, basically nothing.  If it were more like 5V, it would act to reduce Vgs(on), limiting current -- but much more resistance is needed to do that.

Tim

[superKris]

it seems its getting out of hand... i think you dont need 555 vibrator, why dont you sim back the comparator with hysteresis as Tim suggested? into your original drawing? choose Rh appropriately so hysteresis threshold (swing between on and off) is as desired and Ch to give the right time constant.. ymmv.

Thank you, i did not fully understand what Tim was saying, but i think i do now. I was however unable to get this to work in sim. Any reasonable values value make it do either of the following things:
- Make it oscillate at approx 500 to 1000 hz. I Guess this is is what it should be doing, but not at this duty cycle. This will still fry all FETs or disrupt other parts of my system.
- When not oscillating is just goes into the linear region as it did before. I guess this makes sense.

Attached is a picture of the sim.

[T3sl4co1l]

Notice you've got C1 working into R2, meanwhile R8 is many times larger than R2.  So it's not going to behave in the expected way.  Try R8 = 2.2k and R2 = 10k, and R3 and R5 proportionally higher.

Tim

[superKris]

....

Tim

Wow! thank you for taking the time to make this very detailed reply. I know these things take up time, so thank you for that!
Also sorry if my questions seem stupid. I studied electronics like 10-15 years ago, but went another way and recently picked this up as a hobby again.

To clarify what i'm trying to do here: I'm building a power management system for RV's (or any other off-grid system). This is the 2nd module that contains the brain, HMI, and allows for additional connections.
The module if fed by 12V trough a RJ45 cable, or a separate power wire. The RJ45 cable is only allowed to pull up to 1A. If connected trough a separate wire, 3A is allowed, but that's outside of the scope of my question here.

From this central module there are attachments for external devices to draw power. This can either be a system module, or a regular terminal. This means the user can attach loads that are to heavy, or make a short circuit. I want too protect the module from faults like this. You may be right about polyfuses being a easier option but i found these are not great for currents of 1 or 3A and voltages up to 15V.

In your reply about the zener, Do you mean the zener from my earlier schematic providing the voltage reference? If realize now you are right. The zener was not doing anything at that voltage. I was planning to use this zener. The 1N5226 was just a substitute available in multisim. Anyway, i dont need it, and i also dont need additional current draw. I can add or leave the cap. Its going to JLCPCB so the cost are next to 0.


The new zener connected to the transistors base is working in sim. No 3,3V, but it does work help with the delay in the transistor. BTW, i will no be using the actual BC547. I probably will be using a [ur=https://lcsc.com/product-detail/Transistors-NPN-PNP_Changjiang-Electronics-Tech-CJ-MMBT5551_C2145.htmll]MMBT5551[/url] but i guess these are similar.

Anyway, your suggestion with the voltage divider works fine. I think a 1/10 ratio is a little low, as voltages can be as low as 10 or 11V. I if i wanna use the 0,6v-ish Vbe of the transistor i do need increase the cap by a lot. Attached schematic needs approx 30ms to trigger the 555.

Again i'm not sure what inrush current is acceptable. I quess you point me in the right direction by looking at the SOA of the FET. The actual FET i'm planning to is 1/2 of this package. No SOA information there. I'm not sure of high an actual short circuit current might be. The power source will be a large lead accid battery. The limiting part wil most likely be a 1,5mm2 or something like that cable. Maybe 50A is a worst case scenario? With a RDS on of 50mOhm only that is indeed a significant voltage drop and a high disipation. It does sound like 20 tot 40ms will be way to long. Maybe i should aim for just 1ms?

The whole purpose of it is that i dont want it to trigger at inrush currents caused by capacitors in the attached modules. Maybe there will be a total of 1000uF there? Maybe 2000uF? What kind of time would be needed to compensate for this? I really have no idea.

Oh, also supply dependent, in much the same way as the threshold divider is.  You could mitigate that by clamping the comparator's "high" level -- a 1N5231 from GND to pin 1, say.  This changes the hysteresis band, so adjust the feedback resistor as well.

I'm not sure what you mean? The would lower the output voltage making charging C4 slower or something?

Attached is the new updated schematic.

[superKris]

Notice you've got C1 working into R2, meanwhile R8 is many times larger than R2.  So it's not going to behave in the expected way.  Try R8 = 2.2k and R2 = 10k, and R3 and R5 proportionally higher.

Tim

I'm not fully understand why i need to change those values, but i tried it anyway. The effect is still the same as in my earlier sim.

R2,3,and 5 are just a voltage reference. Higher and lower values will mainly change current consumption.
R7 value is only relative to the resistors above.
R8 is only needed for the open collector output of the comparator.

[Mechatrommer]

Thank you, i did not fully understand what Tim was saying, but i think i do now. I was however unable to get this to work in sim. Any reasonable values value make it do either of the following things:
- Make it oscillate at approx 500 to 1000 hz. I Guess this is is what it should be doing, but not at this duty cycle. This will still fry all FETs or disrupt other parts of my system.
- When not oscillating is just goes into the linear region as it did before. I guess this makes sense.

from my experience, its quite hard to make a comparator stable (linear) by itself, adding hysterisis will make it even further away from possibility, we can even put hysterisis to opamp and make it unstable very easily. if you want to make oscillation worse, you may want to reduce feedback resistor (R7?) maybe like half (50K), this will reduce time constant (higher oscillating frequency) but maybe not, due to increased hysterisis region. you may want to probe every comparators pin (output, +ve and -ve inputs) to see how the (Vset or Iset) swings, similar to actual current probe swing at -ve input. with oscillation like that (in your picture), modern mosfet can oscillate even higher freq close to MHz region without heating much (not as worse as PNP at least) given gate's driving impedance is lowish, you'll need "push-pull PNP-NPN mosfet driver" (google that) after comparator output if heat is too much. this extra driver stage will make stability worst next to impossible which is what you want, but that extra components is advisable only if you are reaching to few 100's of KHz.

[Mechatrommer]

R2,3,and 5 are just a voltage reference. Higher and lower values will mainly change current consumption.

yes but R7 and R8 will form voltage divider with those due to feedback loop. when comparator output is low, R7 will parallel to R3&5 to ground, when comparator HI, R8&7 will parallel to R2, this swing will create hysterisis. Tim said, your R7 and 8 are too weak to affect hysterisis (Vref divider 2,3,5) (now you changed annotations between drawings it becomes confusing) also be careful when comparator output is released (HI) R(8,7||2)/R(3,5) will prohibit gate from reaching Vs, you'll need to make sure its (Vgs) smaller than Vgth to ensure fully off mosfet.

[superKris]

Thank you very much again.

I'm however not able to get my circuit to work in sim. I run into a couple of problems.

I cant get the circuit to stop oscillating with the feedback capacitor (parallel to R&). This causes the timer to start all the time, som basically the FET always turns off. That is why i removed the this cap. I'm sorry, i feel very stupid but i do not understand its purpose when combining it with the 555 timer.
In my understanding of the schematic, it does not work without the 555 timer. With just the oscillation switching the load on or off the duty cycle will be way to high to take load off the FET.

A additional problem that became clear is the inrush current caused by any capacitance at the output. I think it will be likely there could be 1000 to maybe even 5000uF connected to the output.

I agree with Tim that 30ms for a short current on the FET is WAY to high. It will kill most small FETs instantly. Dont need a SOA curve for that. So i adjusted C4 to 100nF making the delays approx 0,5ms. However, when i attach any reel capacitance to the output, the inrush current to charge the output takes much longer than the 0,5ms triggering the circuit again.

So i have no idea how to prevent this in a easy way. Does this mean the selected FET  will never be able to charge such a load?

Does this mean my circuit will never work without much additional components?

I started looking at E-fuses and found the TPS259261. Its not ideal with a range of 2A minimal, but its available from JLCPCB assembly, and its reasonable cheap and doesnt require a lot of additional components.

My idea seems like such a simple project. Many cheap power supplies, or other DIY hardware feature over current protection. How is this generally solved?

[T3sl4co1l]

Oh, the feedback capacitor was intended alone, not with the 555.   The 555 provides that functionality (delay before reset).

Try this:
1. Add a resistor from 555 pin 3 to Q1 gate
2. Add a PNP BJT.  Emitter to +VIN, base to R1/R6/Q1-S, collector to Q1-G.
3. Increase R1/R6 so that the desired current limit occurs with 0.6-0.7V dropped.  For example, a 2A current limit needs 0.35 ohms total.  Adjust threshold voltage accordingly.
4. Optional, add a resistor between R1/R6/Q1-S and the added transistor base, typically 1k.  This limits base current under transient conditions, improving reliability.

This reduces the peak current to a nominal level, so that the transistor isn't trying to deliver all the fucking current it possibly can, only some of the fucking current.   With a suitable pass transistor and current limit, this will allow meeting the 30ms (or any other arbitrary time frame) with some size of pass transistor.

Tim

[superKris]

Oh, the feedback capacitor was intended alone, not with the 555.   The 555 provides that functionality (delay before reset).

Try this:
1. Add a resistor from 555 pin 3 to Q1 gate
2. Add a PNP BJT.  Emitter to +VIN, base to R1/R6/Q1-S, collector to Q1-G.
3. Increase R1/R6 so that the desired current limit occurs with 0.6-0.7V dropped.  For example, a 2A current limit needs 0.35 ohms total.  Adjust threshold voltage accordingly.
4. Optional, add a resistor between R1/R6/Q1-S and the added transistor base, typically 1k.  This limits base current under transient conditions, improving reliability.

This reduces the peak current to a nominal level, so that the transistor isn't trying to deliver all the fucking current it possibly can, only some of the fucking current.   With a suitable pass transistor and current limit, this will allow meeting the 30ms (or any other arbitrary time frame) with some size of pass transistor.

Tim

You sir are a genius. Thank you!

Your suggestion works perfectly! It allows for a short over current condition while limiting the amount of current that is allowed to run by switching the FET into the linear region.

The shunt value you suggest is however not practical for my application. Assuming i want to be able to use it at 3A, it will give a to high voltage drop and dissipation.
So this will only work if the FET can hold a current high enough to make a 0,7V voltage drop at a low shunt value. With a 0,1ohm shunt that current is approx 7,5A (in simulation)

Attached are my updated schematic and output. Obviously the retry time is set way to low for simulation purposes.
- The simulation is stable at all voltages from 10 to 15V. My typical Vin is approx 12 to 14V.
- Loads up with a capacitance up to 10000uF seem to work

All of the above is in simulation! I do not now yet if this works in real life.

Now i just need to figure out what currents and timer settings are acceptable. I guess all is determined by the FET i'm planning to use.
This one: https://datasheet.lcsc.com/szlcsc/1810201610_Sinopower-Semicon-APM4953KC-TRG_C20897.pdf

I'm not enough of a expert at reading datasheets, but on page 5 there is a single pulse graph.
My worst real world scenario is a input of 14V and a 0,1 ohm load. In current limiting mode the FET lowers the current to 7,5A max. Lets just assume the full voltage wil drop over the FET. That means it has to burn 100W.
The graph in the dataheet has no data on peaks of 100w but if i read it righ, the FET can hold pulses of 40W for 20ms.

So maybe we can assume the 100W is to much. We should either lower the hold time, lower the hold current, or lower the voltage over the FET.
I guess maybe i can increase the shunt to 0,15 ohm. This lowers the hold current to 5,2A. I lose approx 1 to 2V in the shunt, load, and the connections so thats still 62W. I'm getting close, but still not there.
I really do not want to increase the shunt any further. Should i change the FET? I really dont want to because its in the JLCPCB basic library, its cheap, and has a high Vgs and Vds max. (i'm designing for 26V. Maybe i could go down to 22 or 24V)

In any case, with a load capacitance up to 10000uF, a "hold" time of 25ms seems to be a good target.
I guess a good retry time should be a high multiple of this. approx 0,5s to maybe 1s seems to make sence.

I'm very curious for your feedback to finetune the design!

[T3sl4co1l]

May want to add a thermistor, so that when it gets too hot, say, the 555 THR gets held low, preventing it from cycling.  Which more or less emulates the behavior of bimetallic resettable fuses.

Wait, up to 24V?  LMC555 is only rated to 18 (and I wouldn't recommend using it in an automotive application near there, anyway), what are you doing about that?

Tim

[superKris]

May want to add a thermistor, so that when it gets too hot, say, the 555 THR gets held low, preventing it from cycling.  Which more or less emulates the behavior of bimetallic resettable fuses.

Wait, up to 24V?  LMC555 is only rated to 18 (and I wouldn't recommend using it in an automotive application near there, anyway), what are you doing about that?

Tim

With the right hold time, current (hold) limit, and rety time, and the right FET, i dont think there is a need for temperature measurement.

I do have to look into the supply voltage of the NE555. I was thinking about using a low value resistor to feed it with TVS diode.

Yes, it is an automotive application but the input will already be protected by a advanced protection circuit. During transients the supply voltage will be clamped to approx 25/26V. Its unlikely that these transients will last very long.