TL impedance, for traces over ground plane, is in the ballpark of 50 to 100 ohms. (It can be a bit higher or lower than that, but typically you'll have to do some work to get there, and it won't be a convenient ground plane and 6 mil trace design anymore.)
CMOS pin driver resistance is in the ballpark of 20-50 ohms. Very typical of, say, 74HC and LVC logic, most MCUs and ASICs, some FPGAs (though many may be weaker than this to begin with, and may also have "weak" pin drive ~2mA as an option, among other kinds of drivers), and etc.
So, it's common that you need to add a little resistance outside. This also helps symmetry and consistency, too:
The pull-up driver is typically weaker, maybe 30% weaker than the pull-down. (The pull-up transistor is a P-ch MOSFET; P-ch performs about 2.5x worse than N-ch. The P-ch is made larger to deal with this, but not fully 2.5 times larger, because they want to trade off speed and die area with current capacity.)
The internal resistance itself is poorly controlled, maybe +/-30% variation, between chips (process variation), temperature, and supply voltage range.
By swamping that variance with some tight external resistance, the output resistance becomes more consistent.
You can always use larger resistors, if you don't need the speed. In the limit, this tends towards an RC lowpass filter response, R being the total resistance and C being the trace plus driven input pin(s). (You probably don't want to go too high with R, either, just because high impedances are an invitation to external noise. But that's typically in the 10 to 100kΩ+ range.)
There are also situations where one might choose load termination, or source and load termination, over just source termination. And terminators may be normal mode (a single resistor to ground), differential (resistor between signal lines), or biased dividers (resistor divider from VDD to signal to GND). Though, most of these options are more archaic or special-purpose (dating back to the days of 74LS TTL; or, say, timing applications where signal quality must be absolutely pristine) -- unlikely to be necessary in typical CMOS applications. (The differential terminator pops up in high speed LVDS, for example, but that's not garden-variety CMOS pin drivers.)
Note that termination isn't really necessary for rise time >> trace length (that is, electrical length: physical length divided by speed of light divided by velocity factor). This is, yet another parameter, not well documented in most datasheets; but, again for typical things, it's maybe a half dozen ns (for 74HC at 5V) down to ~1ns (74LVC, 3.3V) or a bit less, with MCUs typically placing towards the higher end of that range. So, the better part of a meter, actually, implying you shouldn't have to worry too much about terminating transmission lines until they leave the board.
One last catch -- series resistors are great for prototyping, and automated testing. If you need to change the value, or remove it entirely (and perhaps to rewire the pins to somewhere else as well?), it's a lot easier than cutting traces. In testing, the resistor allows the current flow to be sensed, and the source and load pin(s) to be exercised relatively independently. (Downside: ~doubling the number of testpoints around an already congested area...)
Tim