Author Topic: Setting VME control registers with a uC?  (Read 97 times)

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Offline macona

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Setting VME control registers with a uC?
« on: October 22, 2020, 09:32:53 am »
I have a Zygo ZMI-1000A VME board I am going to be running in standalone mode. Manual :https://drive.google.com/file/d/1BdC5PO9Ez9nzBIuFvZiN9O6MMSnOlnyf/view?usp=sharing

By default at powerup the board starts in a mode where it dumps 32bit positional data on the P2 bus where I am planning on reading out with a NI 96 channel USB digital IO unit.

But there are a few other modes that would be nice to access but to do that I have to write to a couple control registers on the VME side of things. So I was thinking of taking a teensy and just have it write those registers at power on.

I have never messed with VME before, so this is what I think I need to do, I am hoping someone will be able to sanity check this. I have been reading various VME tutorials and I came up with this.

The plan is:
Set the address switches to 0000
Set the Address Modifers bits AM5-AM0 to 101101 ($2D) Probably just hard wire this. This puts the board in 16 bit addressing mode
Set LWORD* high
Set address bits A15-A1 all low (Offset $00)
Pull AS* low
Set data bits D15-D0 0001000000000000 (Turn on user LED on front panel)
Pull DS0* and DS1* low util DTACK* goes low
Bring DS0* and DS1* high
Bring AS* high after DTACK* goes high
Set address bits A15-A1 000000000001100 (Offset $18)
Pull AS* low
Set data bits D15-D0 0000000000001000 (Turn on controlled data rate mode)
Pull DS0* and DS1* low util DTACK* goes low
Bring DS0* and DS1* high
Bring AS* high after DTACK* goes high
And so on...

I see VME is big endian, is this going to screw me up?

 

Offline Benta

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Re: Setting VME control registers with a uC?
« Reply #1 on: October 22, 2020, 05:06:32 pm »
VME is basically the Motorola (today NXP) M68k bus, buffered and with additional help signals. A good start for understanding operation is to study the MC68020 user manual.
https://www.nxp.com/docs/en/data-sheet/MC68020UM.pdf
Section 5.

Why the MC68020? Because it implements the full-fledged M68k architecture and bus operation. Earlier and later CPUs were either multiplexed or had modified bus operation.

« Last Edit: October 22, 2020, 05:10:00 pm by Benta »
 


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