Electronics > Projects, Designs, and Technical Stuff
Sharing decoupling capacitors
T3sl4co1l:
--- Quote from: OwO on May 17, 2019, 05:12:08 am ---On even a 4 layer board it's not possible to have an effective power plane because with the typical stackup in1 is very far from in2 (over 1mm).
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How does the absolute distance come into this?
--- Quote ---I have done boards with Zynq and DDR3 memory on 4 layers, and in general do not use buried power planes for the purpose of decoupling. When you do have a power plane you have to stitch it at regular intervals especially close to the current sinks (noise sources). The "inductance" seen between two planes can be significant at points not close to stitching caps, and this can be seen experimentally but impossible to simulate in spice.
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Stitching?
Oh, you mean bypass caps, to serve the same purpose as stitching vias in a multi-layer-ground design*? Yeah.
*Which, for those that don't know, is the typical 2-layer approach. Pour ground, route everything else (including supplies), stitch grounds frequently.
Most extreme example of that I've seen, think it was a Sun server, the CPU module. Absolutely fucking plastered with caps, from the VRM to the CPU. The CPU also had a lot of ceramic LGA caps on itself, as well. The effect is to make a mixed distributed-lumped transmission line with an extremely low impedance.
Have to wonder if they really needed all that, or if they just didn't give a shit as far as analyzing the PDN onboard the chip itself, and hacks like phasing different regions, or what. It's my understanding, modern chips get by just fine with onboard networks, so that the external circuit only has to deliver modest changes (bandwidth in the upper 10s of MHz), and all the scary high frequency stuff is handled on die, and on the interposer. Surely the same approaches would've been applicable, but they probably didn't think it would be worth the time to analyze, considering the low quantity and massive sale price of those beasts.
Tim
T3sl4co1l:
--- Quote from: imo on May 17, 2019, 08:23:03 pm ---A friend of mine is running an EMC lab and even BIG players sometimes come with something which does not pass the basic test because of a missing 1cent capacitor.
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Heh.. I would dare say size is a counter indication to competence (the Peter Principle). With a low correlation, mind. Did a job with a large electrical supplier: after spending several years working on this project, their power supply still blew emissions by a huge margin. The board was basically Swiss cheese, no planes whatsoever, ground was a cluster. I tore up existing routing, optimized component placement, put in two solid planes, and reduced emissions by >20dB (depending on frequency range in question).
Tim
Zero999:
--- Quote from: T3sl4co1l on May 17, 2019, 10:07:24 pm ---
--- Quote from: Zero999 on May 17, 2019, 08:02:09 pm ---You quite likely don't need a decoupling capacitor for every IC, especially those which sit in a steady state.
I've just built a circuit with no decoupling and it works perfectly. It's a voltage reference to give 5V and 10mV out for adjusting a DC amplifier. It's very simple, just LM4040-N-2.5 and current limiting resistor, connected to an OP07 op-amp with a gain of two and a potential divider. The output voltages are trimmed by adjusting a couple of potentiometers. There is no other high speed circuitry on the board or nearby and is powered by a 15V linear power supply module, so no decoupling capacitors are required, because there is no AC in the circuit.
https://www.eevblog.com/forum/projects/sharing-decoupling-capacitors/?action=dlattach;attach=739044;image
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There is AC in the circuit whether you intend there to be or not!
Run that from some longer cable for example, and the opamp is likely to oscillate. Dynamics exist whether there is an apparent (large scale) signal present or not! Thermal noise is sufficient to push a system over the edge from an initial resting position (which may accidentally be an unstable point).
This, incidentally, is why it's often hard to get SPICE oscillators to start. There's no noise unless you've specifically placed noise sources. And even so, if the amplitude is below the tolerance settings, it may simply be ignored and smoothed over.
And so, this is the other intent behind good decoupling -- to isolate the on-board network from the outside world. And to do this, resistance is necessary. That is why we dampen or "swamp" resonances with ESR, and often it's as simple as a 100uF electrolytic somewhere. :)
Tim
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I can see your point, but it would have to be really bad for that circuit to oscillate. The construction wasn't perfect: stripboard with a 200mm twisted pair power cable and it worked perfectly.
Look at lots of really old analogue circuits, note that decoupling is either scant or non-existent and they worked perfectly well. It's only become really important since digital circuits which draw high current spikes became popular. Even the old 4000 CMOS logic is normally fins with no or very little decoupling. Just put a 100nF or so on the output of the regulator and all will be well.
ogden:
--- Quote from: T3sl4co1l on May 17, 2019, 10:23:13 pm ---Heh.. I would dare say size is a counter indication to competence (the Peter Principle).
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Nah. Small companies have incompetent engineers as well, they just do not last long - either incompetent engineer in small company or small company riddled with incompetence. That's why you see mostly competent engineers in small companies :D
T3sl4co1l:
--- Quote from: ogden on May 17, 2019, 11:01:27 pm ---Nah. Small companies have incompetent engineers as well, they just do not last long - either incompetent engineer in small company or small company riddled with incompetence. That's why you see mostly competent engineers in small companies :D
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Yeah; to put more nuance on it, I would suppose you could plot competence vs. company size and get a scattered mess, where there is a large variance at the low end and a smaller variance at the high end, with the general trend overall as described.
Tim
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