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| Sharing decoupling capacitors |
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| OM222O:
I think I've been using too many decoupling capacitors in my designs, with each chip getting a 100nF decoupling capacitor of its own. sometimes two chips are as close to each other as physically possible, for example: an op amp and a voltage reference both powered from a 5v supply. A lot of times the chips work well even without any decoupling like Dave showed in his megatron computer video. I was wondering if two chips that are close to each other (usually SOIC-8, so very very close) can share the same 100nF decoupling cap or if I should bump it to let's say 1uF for good measure if I decide to make it shared. |
| golden_labels:
Decoupling capacitors on power lines are there not only to protect an IC against noise and trace inductance effects, but also to protect the rest of the circuit from that IC. This works both ways. As an example see separated power inputs for ADC/DAC and digital parts in microcontrollers. You are literally separating the chip from itself with a pair of decoupling capacitors, because the digital section can cause so much noise that it will affect the analog part. You may remove as many caps as you wish. It’s not like they’re strictly required for chips to work properly. All that happens, when you remove a capacitor, is going outside manufacturer’s spec. Here be dragons. Just that and nothing more. It’s a matter of risk you want to take. Can you test the circuit well enough to show it will work? Remove them. Can you accept the risk involved? Remove them. But there is no general silver bullet solution: you will need to experiment, test and understand what happens in your circuit without a cap. I am myself not believing, that I’ve said the above. For me, as a software developer aiming to write good software, the above is a blasphemy. ;) |
| DaJMasta:
The problem is the 100nF guideline is generally for digital stuff and is only a guideline... there are instances where following it can actually cause issues, and there are instances where you can get away with a tiny fraction of the decoupling caps. So unless you expect the amp to be using its maximum slew rate a lot or sourcing a lot of current, it probably won't be generating as much noise as a fast toggling digital circuit, but since it's analog stuff which is generally going to be more effected by noise, why not "compromise" and use a couple of different values, maybe a 100nF and a 1uF, maybe a 100nF and a 10nF. Having your reference bypassed is important, and having a reservoir of charge there is probably a good idea (maybe take a look at the datasheet recommendations), and while the circuits at this node probably won't be generating much noise on their own, they will be sensitive to smaller fluctuations in supply voltage than a digital circuit, so I wouldn't skimp on the bypassing caps which help filter the rails at the point where the current is needed. Just using a single 1uF cap would mean you had a larger charge reservoir to dampen transients, but it would also mean that the impedance of the capacitor will be higher than a 100nF or smaller cap at high frequencies, so only going with a low frequency, larger value bypass cap would actually be less effective at removing high frequency noise on the power rail than a small one. |
| ataradov:
One per chip is not sufficient in many cases. You need one per power supply pin. This does not apply to slow circuits. But it starts to matter a lot on chips with PLLs and other fast logic. I would definitely at least put a footprint for one capacitor per device. You don't have to populate it if you find it unnecessary later on. |
| OM222O:
most of my designs are dc with very few transients, and even then not at high frequencies. the board size is pretty small too 10x6.8cm and the tracks are no longer than a few CM. I can understand why multiple ones would be required for high speed circuits but I'm assuming sharing them between chips is fine in my case? |
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