Author Topic: Shielded inductor clearance  (Read 606 times)

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Offline OwenHTopic starter

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Shielded inductor clearance
« on: November 27, 2024, 10:41:09 am »
Hi everyone,

I’m working on a very compact PCB design that includes a shielded inductor from a 24V SMPS located close to an ideal diode controller circuit. The minimum clearance between the edge of the inductor and the nearest component in the ideal diode controller circuit is approximately 4mm.

The SMPS boosts 12V to 24V with an output current of around 2A. While I’m aware that magnetic shielding in fully encapsulated inductors is highly effective, I’ve had to position the components closer than I’d like due to space constraints on the board.

The PCB is an 8-layer stackup with multiple ground planes. Any longer traces that must be routed near the inductor are placed on internal layers, sandwiched between at least one ground plane above and below for added shielding.

Does anyone have insights or guidelines on the recommended clearance for shielded inductors in such scenarios? Most of the resources I’ve found seem a bit ambiguous on this topic.

I’ve attached a screenshot of the layout for reference.

Thanks!
 

Offline selcuk

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Re: Shielded inductor clearance
« Reply #1 on: November 27, 2024, 11:37:06 am »
I don't have an exact answer for your question. But I can recommend reading this application note especially for connecting the start of the winding of an inductor. This may be more important than a few mm difference of clearance.

https://www.we-online.com/components/media/o109027v410%20ANP047c_The%20Behavior%20of%20Electro-Magnetic%20Radiation%20of%20Power%20Inductors%20in%20Power%20Management.pdf
 
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Offline mtwieg

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Re: Shielded inductor clearance
« Reply #2 on: November 27, 2024, 01:59:19 pm »
Does anyone have insights or guidelines on the recommended clearance for shielded inductors in such scenarios? Most of the resources I’ve found seem a bit ambiguous on this topic.
Anecdotally, I have never run into a situation where stray magnetic field from an inductor caused noticeable problems. And I've never been shy about putting other circuitry directly adjacent to the inductor (so long as there's no high dv/dt nets nearby). For example, the SMPS control chip will usually be placed directly next to the inductor/transformer, and contains other sensitive circuits, IME magnetic coupling has never been an issue (coupling via capacitance or bad grounding are the bigger worries). But it would be difficult to distinguish magnetic coupling from other effects without very careful testing.
« Last Edit: November 27, 2024, 02:01:37 pm by mtwieg »
 

Offline OwenHTopic starter

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Re: Shielded inductor clearance
« Reply #3 on: December 11, 2024, 03:20:48 pm »
Thanks for the help!

I think I will give it a try.
 

Online mawyatt

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Re: Shielded inductor clearance
« Reply #4 on: December 11, 2024, 04:11:01 pm »
Open air far-field magnetic fields fall off as ~ 1/R^3,  while near-field coupling falls off as ~1/R^2 and transitions to 1/R^3 as R increases. So small changes in spacing can prove beneficial in reducing coupling.

Best
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Offline Faranight

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Re: Shielded inductor clearance
« Reply #5 on: December 11, 2024, 05:49:02 pm »
I vaguely remember reading somewhere not to place two inductors close to each other since there may be magnetic field coupling, but since you only have one inductor, it's not really a problem.
The other important thing being that the feedback trace of any PMIC is routed away from noisy traces and elements (inductors) that may cause interference and possibly oscillation.
Since you have a multi-layered board with several GND planes and some signal traces in-between, that also contributes significantly to reduced EMI emissions.
Fara-day? Fara-night.
 

Offline Krotow

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Re: Shielded inductor clearance
« Reply #6 on: December 11, 2024, 06:13:18 pm »
My 2 cents: in some DC converter designs switching inductor become pretty hot. Even hotter than the DC converter chip that drive it. Keeping distance between the inductor and the rest of component then become obvious.
 


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