Electronics > Projects, Designs, and Technical Stuff
short circuit protection of IGBT?
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David Hess:

--- Quote from: coppercone2 on December 28, 2018, 08:37:29 pm ---
--- Quote from: David Hess on December 28, 2018, 07:39:49 pm ---I do not remember where now but I saw IGBT short circuit protection implemented using a low voltage high current power MOSFET in series with the emitter of the IGBT.  Under normal conditions, the IGBT gate controlled switching but under fault conditions, the gate of the power MOSFET was clamped low very quickly disconnecting the emitter of the IGBT and driving the gate voltage of the IGBT negative.
--- End quote ---

based on your understanding does this like specifically target one of the failure modes described by the picture?
--- End quote ---

My recollection is that it was done to provide the fastest possible turn off under overload conditions; it could be considerably faster than driving the gate of the IGBT because of the lack of Miller capacitance.  I think it was implemented by monitoring some function of current, time, and collector voltage so it would help in all cases except excessive collector voltage; maybe it only monitored current and time.

It could not have been a safety feature because failure of the IGBT would destroy the power MOSFET anyway.  What I do not know is why the power MOSFET was not driven as the switching device instead of the IGBT; maybe it was added to improve the reliability of an existing design.
T3sl4co1l:
BTDT, measured the transient waveform myself.  'Twas a ramp up to about 4500A, a few microseconds long.

Desat protection works.

In 2.5 years of designing induction heaters (of tabletop and floor-standing size), I only blew up two handfuls worth of transistors -- two only because one hand is needed to hold the one 600A module that died.

Tim
coppercone2:
i still don't understand why it fails 1uS later??

is it not turning off impedance wise or is something happening inside.

does it overload and get messed up, turn off on the gate, but still conduct enough energy in some kind of area inside of it thats irregular to break in around 1uS or is it more complicated and weird? if you put a ammeter on the power supply for it would it draw current during this 1uS period?

to help define what energy shock is.
coppercone2:
ok so its not some bizarre shit with stored energy some how.

but there is already some internal damage if that happen at t=0 of that 1uS? even if you magically got rid of all current flow. once whatever preconditions happen before t=0 its fucked?

before t=0 of energy shock, there is a punch through (damage layers)?
coppercone2:
I don't understand because it says it will fail due to thermal runaway, not that there is punch through damage. when talking about energy shock.

does punch through cause migration? i thought it was a transient state.

Punchthrough
When the base–collector voltage reaches a certain (device-specific) value, the base–collector depletion region boundary meets the base–emitter depletion region boundary. When in this state the transistor effectively has no base. The device thus loses all gain when in this state.

why is it already dead then? punch through doesn ot sound fatal.
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