Author Topic: Side Scan Sonar project  (Read 5935 times)

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Offline maxnilTopic starter

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Side Scan Sonar project
« on: July 28, 2013, 10:07:59 am »
Hi,

I'm in the process of building my own Side Scan Sonar (SSS), or at least the electronics and software for it.

I have got a 'SSS fish' (watertight metal tube with ultrasonic transducers) identical to this one http://www.abc.se/~pa/sture/project/tow2000.jpg.

My plan is to have almost all electronics located inside the 'SSS fish' to reduce the signal loss in the cable, interference, and the amount of data sent through the cables.

The data transfer and communication between the towed 'SSS fish' and the computer on the surface will be through standard 100 MBps Ethernet, and the power for the 'SSS fish' will come through the same Ethernet cable (POE, Power Over Ethernet).

The 'SSS fish' has two ultrasound transducers (left and right) that has a center frequency of approximately 220 KHz.

The electronics inside the 'SSS fish' will consist of five parts:
- Main controller board with a quite large FPGA that does digital signal processing of the received signals from the ultrasound transducers, the FPGA will also handle the Ethernet communication (I will include a micro controller of some sort (Altera NIOS or OpenRisc OR1200) that runs the TCP/IP protocol stack etc).
- Receiver board with analog to digital converters (16 bit ADC @ 2 MSPS), voltage gain amplifiers (VGA for time variation gain)
- Transmitter board with DC/AC step up converter (12V -> 500-1000V), digital to analog converters to be able to modulate the transmitted signal (sweep +/- 5% of center frequency, or something like that).
- Power supply board that conforms with POE+ (20-25W Power Over Ethernet), and produces the main voltages that the three other boards needs (+5V, +/-12V)
- Sensor board that has 3D accelerometers, 3D gyros, 3D compass, temperature sensors (both for internal temperature within the 'SSS fish' as well as external water temperature outside the 'SSS fish'), pressure sensor (to get the exact depth of 'SSS fish'). All sensors will be controlled by a small 8-bit microcontroller that process the raw data from the sensors, and sends it in human readable form to the microcontroller within the FPGA on the main controller board before it is sent to the PC software on the surface.

Since I will have a quite large FPGA (Altera Cyclon III (EP3C40)) controlling everything, I can do lots of computer intense digital signal processing in hardware, and I can experiment with different transmit modulations (CW, CHIRP etc).

The current status of the project is that I have finalized the design of the main controller board, and sent the Gerber files for the PCB to be manufactured (I'm using OSH Park, this is the first time using them to make a PCB for me, so it will be interesting to see the result). I have also ordered a solder paste stencil for the board. The board and stencil will hopefully arrive with 1-2 weeks.

I have also started on the receiver board design, but so far I'm mostly trying to figure out what components (ADC, VGA, LNA etc) to use, and the sensor board (here I know what components I will use).

This is a quite big project that I work on on my spare time, but I hope to have something working this year.

If you have any experience or suggestions on how I should implement stuff (electronic, FPGA RTL or PC Software), please let me know.

I will try to update this post when there are major progress in the project.

Regards
 Max
 

Offline fcb

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Re: Side Scan Sonar project
« Reply #1 on: July 28, 2013, 11:25:28 am »
20-25W....  Have you got a battery in the buoy?



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Offline Marco

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Re: Side Scan Sonar project
« Reply #2 on: July 28, 2013, 11:28:48 am »
Why FPGA? Do you just want the extra challenge of implementing all your signal processing in (variable precision) fixed point?
« Last Edit: July 28, 2013, 11:32:40 am by Marco »
 

Offline maxnilTopic starter

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Re: Side Scan Sonar project
« Reply #3 on: July 28, 2013, 09:45:12 pm »
20-25W....  Have you got a battery in the buoy?

The Side Scan Sonar is towed behind a boat, and in the boat there are plenty of power.

/Max
 

Offline maxnilTopic starter

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Re: Side Scan Sonar project
« Reply #4 on: July 28, 2013, 09:51:19 pm »
Why FPGA? Do you just want the extra challenge of implementing all your signal processing in (variable precision) fixed point?

FIrst I thought that I should just use some kind of standalone micro controller, but I realized that I still need some glue logic to connect the ADCs and DACs to the micro controller so why not put the micro controller inside a FPGA.

I selected the biggest FPGA that I can put on a two layer PCB, and solder by hand (i.e. not a FPGA with a big BGA package), in that way I can add signal processing functions to the micro controller.

Initially I will just send the raw ADC data to the PC and do the digital signal processing in SW (it might or might not be able to do it all in real time)

/Max
 

Offline fcb

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Re: Side Scan Sonar project
« Reply #5 on: July 29, 2013, 12:18:51 am »
20-25W....  Have you got a battery in the buoy?

The Side Scan Sonar is towed behind a boat, and in the boat there are plenty of power.

/Max

I guessed that, but your posting looks like your trying to power the whole shebang of POE, and I know the pinger will use alot more than that.
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Offline maxnilTopic starter

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Re: Side Scan Sonar project
« Reply #6 on: July 29, 2013, 04:32:15 pm »
20-25W....  Have you got a battery in the buoy?

The Side Scan Sonar is towed behind a boat, and in the boat there are plenty of power.

/Max

I guessed that, but your posting looks like your trying to power the whole shebang of POE, and I know the pinger will use alot more than that.

Well, the transmit cycle ('ping time') of the transducer is very short, around 0.5%, so 99.5% of the time the transducer is in receive mode, and is not consuming any power, so 'all' I have to do is to use that idle time to store enough energy into a bank of capacitors before the next 'ping' is sent out.

So even if I send out 2x 1000W (left and right transducer), that would in theory (not taking any losses into account) only require in average 10W of continues power (I know that there will be significant losses, but I might not need as much as 2x 1000W...

/Max
 

Offline i_like_sparks

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Re: Side Scan Sonar project
« Reply #7 on: October 08, 2013, 12:53:43 am »
Just found this thread, sound like an exciting project! I'm currently trying to build something similar, and was wondering what transducers you're going to use?
 

Offline temmi_hoo

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Re: Side Scan Sonar project
« Reply #8 on: December 14, 2013, 01:08:45 pm »
This sounds very interesting!

PoE as 802.3at will be able to power the fish end, especially if you can put in a nice buffer cap to even out that load. I recommend proper real PoE since then you can just apply solved problems from data sheets. Linear has some nice chips but so do the others.

How far have you gone now? Any tests yet?

I'm involved in a project doing distributed control automation with PoE powered ARM nodes. Our main idea is being able to deliver reasonable amounts of power to actuators, lighting, cameras etc using local point of load power converters and the data communications just happens to come free within the same cable.

PoE is quite elegantly designed without breaking existing standards and uses common cheap hardware. Especially the cable is among the cheapest cable overall per meter.
 

Online Fraser

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Re: Side Scan Sonar project
« Reply #9 on: December 14, 2013, 01:55:24 pm »
IIRC Dave L Jones worked on aquatic sonar systems. May be worth contacting him direct ?

« Last Edit: November 29, 2022, 07:09:59 pm by Fraser »
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Offline ozhan

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Re: Side Scan Sonar project
« Reply #10 on: November 29, 2022, 10:53:56 am »
Hi Maxnil,

At what stage are you on the side scan sonar project. I am also interested in developing my own SSS hardware and software. Maybe we can cooperate what do you think? Why to use FPGA for signal processing? Why not a DSP processor to use instead od a FPGA since FPGA signal processing development is much harder than using a DSP processor from TI or analog devices.
 

Online dmills

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Re: Side Scan Sonar project
« Reply #11 on: November 29, 2022, 05:28:43 pm »
Last sidescan I did used an array of three longitudinal receive elements unevenly spaced together with a single transmit element on each side, playing phase games with the unevenly placed receivers let me get angle in the vertical plane as well as distance so I could actually get a bottom profile.

Took quite a lot of correlation (which FPGAs are really good at), but it did eventually work.

Word of advice, don't forget the need for a matching network to get meaningful power into the transducers and to lower the Q enough that your transmit pulse doesn't spend ages ringing down, particularly important if using one element for both transmit and receive. I commend a 5th order network with the transformer secondary inductance tuning out the transducer fixed capacitance maybe half an octave above resonance and a series resistor lowering the Q (Only really dissipates power at the band edges). You can get maybe an octave of bandwidth out of a a common 1-3 Piezo composite element if the acoustic match is reasonable, more being a big ask.
Dont forget that the element looks capacitive one side of resonance and inductive the other and the phase shift is NOT negligible, the driver has to survive both extremes (An active clamp can be very much your friend). 

Do a G/B plot of the transducer (in water and make sure it is wetted out, washing up liquid helps here) to see what you need to match into. 
 

Offline ozhan

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Re: Side Scan Sonar project
« Reply #12 on: December 15, 2022, 06:24:15 am »
Hi,

I am also interested in building my own side scan sonar. I plan to use the same transmit frequency as you did(200 Khz). What I plan in the electronics is that first I will digitize the analog data with a sampling rate of 2Mhz. Then I will capture digitized data using a FPGA. Then in the FPGA , I will down convert the digitized data using a Digital down converter toa baseband signal. Last I will include a complex correlator in the FPGA. What do you think am I on the right track speaking of FPGA algorithm.

thanks in advance

Ozhan
 


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