Other than that, pretty sweet looking board. What are you going to use it for?
you using those Meder sil reed relays ? ive had bad experience with em. they tend to be sticky ...
Coto is far better.
By the way, PCB is from Elecrow. Thought I'd give them a try. Not quite as nice as ITead - the silkscreen is smudged in a couple places, the HASL isn't quite L* (this was actually enough to be a bit of an annoyance with the TSSOPs, I imagine it could be a bear with lots of fine-pitched packages and reflow soldering), and the silkscreen registration is off a bit. It just looks kind of cheap, at least up close. One of the boards actually had a solder lump hanging off one of the pads. But electrically, everything is just fine, nothing questionable in the copper and the drill registration is spot on.
(Also, I am very impressed with the output of your potato. Mine always seem to lack fine detail; perhaps I need to parboil them before exposure?)
Edit: Aaaaaaaaaargh... GCC....... it's a great compiler for PC, but the optimize-for-size mode is pretty crap for MCU. I just dropped from 3280 bytes to 3246 by adding function prototypes for the functions in main.c. I can only presume it was too stupid to "look ahead" and see them while running the optimization if I didn't mention them first.....? :wtf: And even with -Os, I can spot a few places in the disassembly where it stuffs a register multiple times without actually using the intermediate values...
And people keep calling me an idiot for preferring to use AVR Assembler. :)
ldi r31,0
adc r31,r1
clr r31
sbci r31,hi8(-(RX_BUFFER))
pop r31
Speaking of which: I shaved another 5% or so off by compiling the code as - get this - C++.There are subtle differences between how const is defined between C and C++. The C++ definition is stricter and allows for more optimization. There may be other differences that are relevant, for example in the aliasing rules. C++ is not a strict subset of C, although most incompatibilities are fairly minor. It may also be that the C++ compiler has different default flags than the C compiler.
This is with size optimization ON! I have not left out any r31 operations. So...... clear r31, set r31, clear r31, set r31, set r31. Where's "read r31"? What a piece of shit! Why is "check for register stores not followed by a read" not an optimization step with -Os on?? Kill me now.....My guess is that they use one of the flags set by sbci after the pop. Note that adc and sbci both set and use the carry flag, and clr sets a bunch of other flags. Although I can't see how adc would set the carry flag since r31 is 0 at that point.