EEVblog Electronics Community Forum
Electronics => Projects, Designs, and Technical Stuff => Topic started by: uranium235 on June 13, 2010, 08:14:09 pm
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im just new here in the eevblog forum so its my 1st post here
simple training and developing board
im planning to create this board simple training and developing board
i already integrate the powersupply, leds, 2 seven segment leds buttons and trimmers
the violet square in the middle is the breadboard and beside that is a plug-in boards
dimension is 6" X 10" i would like to ask some opinion on my work ;D
(http://i1010.photobucket.com/albums/af221/psumaker/dboard.jpg)
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Your doing the opposite of what's common now. Instead of making breakout boards that you plug into the breadboard, you're making a giant breakout board that you plug in the breadboard. Not a fan of the concept. I would rather have a power module, button breakout, LCD breakout... all separate. Then just plug together what you need.
As for the PCB, looks fine to me. Probably cut those 90 deg bends off to two 45's. Your power caps should be closer to the regulator and inline with the power path. Might want to use vector font type for your initials which looks better IMO. Also copy that text onto the silkscreen layer if you're actually getting this produced. It's too small for me to see the labels, but for something like this, I'd put a lot more info on the silkscreen.
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Probably cut those 90 deg bends off to two 45's.
I have done a hand full of PCB designs and I always heeded this rule without really understanding why.
Why is a 90 degree turn in a trace unwanted? Does it have to do with trace length?
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Probably cut those 90 deg bends off to two 45's.
I have done a hand full of PCB designs and I always heeded this rule without really understanding why.
Why is a 90 degree turn in a trace unwanted? Does it have to do with trace length?
It's just an old aesthetics rule, no real electrical reason for it unless you start talking very critical high frequency and/or high voltage design, and even then it's debatable.
In terms of length, that can occasionally be an issue in terms of trace resistance or loop area or some such, but your circuit has to be very special or critical for the tiny increase in length to matter.
It may also be an issue when etching very small geometry traces (say <5 thou). As the etchant swirls around it can eat away at 90 degree bends more than 45 degree bends, or T junctions with chamfers. But that's process dependent and generally nothing to worry about these days.
Dave.
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Your doing the opposite of what's common now. Instead of making breakout boards that you plug into the breadboard, you're making a giant breakout board that you plug in the breadboard. Not a fan of the concept. I would rather have a power module, button breakout, LCD breakout... all separate. Then just plug together what you need.
As for the PCB, looks fine to me. Probably cut those 90 deg bends off to two 45's. Your power caps should be closer to the regulator and inline with the power path. Might want to use vector font type for your initials which looks better IMO. Also copy that text onto the silkscreen layer if you're actually getting this produced. It's too small for me to see the labels, but for something like this, I'd put a lot more info on the silkscreen.
you have a point it looks like a giant breadboard the plug in im refering to is easy to build test instruments like logic probes and transistor tester it will also reduce the size of the test leads and be able to change tools in depending on my projects etc.
most of the time im outside my work area so i could work with some other instruments in hand aside for multitester which i alway bring
btw is for my personal use and i dont intend to mass produce the board
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I prefer add-on boards to have a row of pins on the edge so it plugs into the edge of the breadboard without covering too much area, or the board can stand up on the breadboard (using two rows if needed) if it's not too tall. I had that concept for a DS89C420 CPU card (also has 64k of shared data/instruction SRAM with NiMH battery backup, RS-232, clock/reset, and power supply) that I actually started building when I was in high school. Now that I know more about microprocessors, I'm going to find that unfinished board and try to make it work. I'm thinking of stuff like using it as a JTAG programmer or I2C/SPI debug tool/EEPROM writer, among other things.
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I prefer add-on boards to have a row of pins on the edge so it plugs into the edge of the breadboard without covering too much area, or the board can stand up on the breadboard (using two rows if needed) if it's not too tall. I had that concept for a DS89C420 CPU card (also has 64k of shared data/instruction SRAM with NiMH battery backup, RS-232, clock/reset, and power supply) that I actually started building when I was in high school. Now that I know more about microprocessors, I'm going to find that unfinished board and try to make it work. I'm thinking of stuff like using it as a JTAG programmer or I2C/SPI debug tool/EEPROM writer, among other things.
the space are reserved for xr2206 based waveform generator
it only require few external components
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Probably cut those 90 deg bends off to two 45's.
I have done a hand full of PCB designs and I always heeded this rule without really understanding why.
Why is a 90 degree turn in a trace unwanted? Does it have to do with trace length?
90 degree turn produces small amount of extra capacitance at corners, thus impedance drops. 45 degree turns does this too but much less.
Generally, this matters only when one wants controlled impedance traces using microstrip/stripline transmission line, which precludes the use of anything less than two layers. Even with two layers, it is hard to make digital circuit microstrip lines with reasonable trace width since trace width must be about same or more than the dielectric thickness from contiguous ground plane in other side to achieve sanely low impedance (say, 70-80 ohms or less).
In single sided boards and most two-sided ones without contiguous ground plane, it does not matter. Like said, purely aesthetics in this case.
Like Dave said, there might be some manufacturing issues, but I wouldn't make an issue about it.
Regards,
Janne
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What net is your pour connected too? It doesn't look like it's connected to ground.
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What net is your pour connected too? It doesn't look like it's connected to ground.
the pour is not yet connected. im still redesigning the board
Probably cut those 90 deg bends off to two 45's.
I have done a hand full of PCB designs and I always heeded this rule without really understanding why.
Why is a 90 degree turn in a trace unwanted? Does it have to do with trace length?
90 degree turn produces small amount of extra capacitance at corners, thus impedance drops. 45 degree turns does this too but much less.
Generally, this matters only when one wants controlled impedance traces using microstrip/stripline transmission line, which precludes the use of anything less than two layers. Even with two layers, it is hard to make digital circuit microstrip lines with reasonable trace width since trace width must be about same or more than the dielectric thickness from contiguous ground plane in other side to achieve sanely low impedance (say, 70-80 ohms or less).
In single sided boards and most two-sided ones without contiguous ground plane, it does not matter. Like said, purely aesthetics in this case.
Like Dave said, there might be some manufacturing issues, but I wouldn't make an issue about it.
Regards,
Janne
regarding the rule on trace angle and width, how this rule applied when designing a certain board
im still a student so i dont have knowledge regading trace width and angle :D :D :D
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90 degree turn produces small amount of extra capacitance at corners, thus impedance drops. 45 degree turns does this too but much less.
About 0.012pF (http://www.sigcon.com/Pubs/edn/bigbadbend.htm) for an 8-mil trace, or a 0.3% reflection of a 100ps step.
Generally, this matters only when one wants controlled impedance traces using microstrip/stripline transmission line, which precludes the use of anything less than two layers. Even with two layers, it is hard to make digital circuit microstrip lines with reasonable trace width since trace width must be about same or more than the dielectric thickness from contiguous ground plane in other side to achieve sanely low impedance (say, 70-80 ohms or less).
It starts to matter above 3-20GHz or so, depending on who you ask. Not something your average PIC or AVR is going to produce ;).
In single sided boards and most two-sided ones without contiguous ground plane, it does not matter. Like said, purely aesthetics in this case.
I find it quite unlikely for anyone to do multi-GHz signals on a one or two layer board.
Like Dave said, there might be some manufacturing issues, but I wouldn't make an issue about it.
I would expect any commercial PCB manufacturer to have tuned their process so it doesn't occur, but might an issue if you etch it yourself.
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Generally, this matters only when one wants controlled impedance traces using microstrip/stripline transmission line, which precludes the use of anything less than two layers. Even with two layers, it is hard to make digital circuit microstrip lines with reasonable trace width since trace width must be about same or more than the dielectric thickness from contiguous ground plane in other side to achieve sanely low impedance (say, 70-80 ohms or less).
It starts to matter above 3-20GHz or so, depending on who you ask. Not something your average PIC or AVR is going to produce ;).
Just to add that I prefer not to speak about frequencies unless signal is sinusoidal or bandwidth limited, because it is very misleading. One of my biggest "eureka"-moments in my EE career so far was when I realized that fundamental frequency of digital signal really does not matter :) Better to speak just about rise/fall-times. 1 Hz signal with steep edges is enough you give signal integrity problems, if the edges matter. It really does not matter how many changes you make per time unit if one transition makes it cleanly through the transmission line structure.
In single sided boards and most two-sided ones without contiguous ground plane, it does not matter. Like said, purely aesthetics in this case.
I find it quite unlikely for anyone to do multi-GHz signals on a one or two layer board.
Microwave circuits are most often constructed on two layer boards (although perhaps not on FR-4) and they benefit almost nothing about multilayer boards, since vias are going to ruin your otherwise perfect design. But I guess that you mean digital circuits.
Regards,
Janne
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Is a 90 degree turn in an 8 mil trace going to have the same parasitics (due to the bend) as a 20 mil trace? Intuition tells me its less with a larger trace but I just want to know for sure.
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Just to add that I prefer not to speak about frequencies unless signal is sinusoidal or bandwidth limited, because it is very misleading. One of my biggest "eureka"-moments in my EE career so far was when I realized that fundamental frequency of digital signal really does not matter :) Better to speak just about rise/fall-times. 1 Hz signal with steep edges is enough you give signal integrity problems, if the edges matter. It really does not matter how many changes you make per time unit if one transition makes it cleanly through the transmission line structure.
Frequency for me is about bandwidth, so it's about the highest significant harmonic. So 3GHz corresponds with a rise/fall time of 100ps or so, and 20GHz with about 20ps. I agree that it's a good idea to elaborate on that for beginners.
Microwave circuits are most often constructed on two layer boards (although perhaps not on FR-4) and they benefit almost nothing about multilayer boards, since vias are going to ruin your otherwise perfect design. But I guess that you mean digital circuits.
You're right, I was thinking about 'slow' (compared to microwave) digital or mixed-signal circuits, where dedicated power and ground planes are the norm, and you want ground planes close to your signal layers to get microstrip traces of a reasonable width. I don't think people worry about that in the microwave world, since the traces must be really wide to minimize skin-effect losses anyway. My point was that the bends is one of those last 0.1% things for most signals used in current electronics products (especially hobby), so unless you got those first 99.9% right, it's not worth worrying about. Manufacturing a two layer board on FR-4 at the cheapest Chinese vendor you can find (no controlled impedance for that price) is not likely to satisfy that.
Is a 90 degree turn in an 8 mil trace going to have the same parasitics (due to the bend) as a 20 mil trace? Intuition tells me its less with a larger trace but I just want to know for sure.
Yes, I believe it will increase with the square of the width (capacitance of two plates depends on surface and distance, plus some dielectric constants), so 20mil might be .06pF. Not sure what dielectric width this was calculated for, probably not 1.6mm since Howard Johnson is probably used to 4+ layer boards. Much better than the tolerances in most cheap PCB processes, I think. This is one of the reasons that it's much more significant in the microwave world, where traces are usually much wider.
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Is a 90 degree turn in an 8 mil trace going to have the same parasitics (due to the bend) as a 20 mil trace? Intuition tells me its less with a larger trace but I just want to know for sure.
Yes, I believe it will increase with the square of the width (capacitance of two plates depends on surface and distance, plus some dielectric constants), so 20mil might be .06pF. Not sure what dielectric width this was calculated for, probably not 1.6mm since Howard Johnson is probably used to 4+ layer boards. Much better than the tolerances in most cheap PCB processes, I think. This is one of the reasons that it's much more significant in the microwave world, where traces are usually much wider.
I understand that parasitic capacitance is going to increase with a larger trace (proportional to area/distance). A straight 8 mil trace is going to have a smaller capacitance than a 20 mil trace of the same length. Now if you took the these same 2 traces and introduced 90 degree bends in them both would the effective capacitance increase by the same amount? Be more for the 20 mil trace? Less for the 20 mil trace? I really only mean the capacitance associated with the bend itself and not the parallel plate phenomenon. I just think if your trace is sufficiently large enough a 90 degree bend might be 'invisible' to the current but it certainly wouldn't be unheard of for me to be wrong.
Maybe you did answer my question and it just didn't get through to me. It certainly wouldn't be the first time.
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so is the 90 and 45 degree bend is not much issue working on low frequencies (below GHz range) or it does? lets say microcontrollers like PIC or AVR
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so is the 90 and 45 degree bend is not much issue working on low frequencies (below GHz range) or it does? lets say microcontrollers like PIC or AVR
Absolutely no issue. Don't lose your sleep because of it ;D
Regards,
Janne
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here my 1st design the concept is a small training board for avr micros the i use ZIF socket instead of breadboard the board the i posed earlier is my current project an expanded version using 2 breadboards
that i could make my electronic project for analog and digital circuits inculding MCUs ;D ;D
(http://i1010.photobucket.com/albums/af221/psumaker/d-board.jpg)
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I understand that parasitic capacitance is going to increase with a larger trace (proportional to area/distance). A straight 8 mil trace is going to have a smaller capacitance than a 20 mil trace of the same length. Now if you took the these same 2 traces and introduced 90 degree bends in them both would the effective capacitance increase by the same amount? Be more for the 20 mil trace? Less for the 20 mil trace? I really only mean the capacitance associated with the bend itself and not the parallel plate phenomenon. I just think if your trace is sufficiently large enough a 90 degree bend might be 'invisible' to the current but it certainly wouldn't be unheard of for me to be wrong.
Maybe you did answer my question and it just didn't get through to me. It certainly wouldn't be the first time.
The extra capacitance associated with the bend is caused by the extra copper area in that bend (the trace gets effectively wider in the corner, which is why mitring helps), which usually creates a capacitor in combination with the ground plane (parallel plates with FR-4 in between). You can also think of it as decreased inductance, same thing as far as transmission lines are concerned (sqrt(L/C)).
It might be that the relative change in impedance is about the same for both trace widths, since the wider trace will have a higher capacitance and lower inductance per unit of distance. But you'd have to do the proper calculations to confirm that. My guess would be that the effect gets stronger with wider traces, since parasitic capacitance in bends is a function of the square of the width, and capacitance/inductance per unit of distance is a function of just the width.
This may not be true any longer when your rising/falling edge length is in the same order of magnitude as your bend, but you'd need rise times in the order of 10ps to reach that. Things get more interesting when your edge length approaches your bend length ;).
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Your LED labels go off the top of the board. Your button labels look like they are going to go under the packages. Again, more data on the silkscreen if this is a test board. Label the power and ground pins. Which of the pin to your MAX232 is transmit and which is receive? Do you really need the colour of the LED's? Make sure the labels don't bump into each other. You can hit 'smash' to break them apart and move the labels wherever you want.
Increase your power trace widths. Make your polygon your ground net.
What does the datasheet on your regulator specify for capacitors? I only see a capacitor on the output.
Run the power through your capacitor to the rest of the circuit. You are branching off the power to the level shifter before it gets through the capacitor.
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http://www.sigcon.com/Pubs/edn/bigbadbend.htm
http://www.speedingedge.com/PDF-Files/90degbrooks.pdf
I had always been taught that a 90 degree bend could cause an acid trap, but unless your using some sort of odd etch process, I can't think of why that would be true.
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I can't tell for sure but it looks like you don't have your pour attached to your ground net. This might free up more real estate for running your traces, or atleast make it easier on the eyes for debugging if needed.
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Your LED labels go off the top of the board. Your button labels look like they are going to go under the packages. Again, more data on the silkscreen if this is a test board. Label the power and ground pins. Which of the pin to your MAX232 is transmit and which is receive? Do you really need the colour of the LED's? Make sure the labels don't bump into each other. You can hit 'smash' to break them apart and move the labels wherever you want.
Increase your power trace widths. Make your polygon your ground net.
What does the datasheet on your regulator specify for capacitors? I only see a capacitor on the output.
Run the power through your capacitor to the rest of the circuit. You are branching off the power to the level shifter before it gets through the capacitor.
its only an initial design after the routing there is lots of improvement need ;D ;D
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here my 1st design the concept is a small training board for avr micros the i use ZIF socket
Is it just me, or does anyone else out there think ZIF sockets are just the ducks guts?
If it's got a ZIF socket it's just gotta be a nice design!
Is there something magical about them, or is it just me being weird again? ;D
Dave.
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here my 1st design the concept is a small training board for avr micros the i use ZIF socket
Is it just me, or does anyone else out there think ZIF sockets are just the ducks guts?
If it's got a ZIF socket it's just gotta be a nice design!
Is there something magical about them, or is it just me being weird again? ;D
Dave.
i already tear down one ZIF socket its all simple yet ingenious design
the key parts is the contacts they play several role inside ZIF socket that i have
a pin that can be soldered
a spring for the release mechanism
a small clip (it looks like a small tweezers except that it is wide) the holds each pins of the ic
and a contact ;D ;D
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its only an initial design after the routing there is lots of improvement need ;D ;D
I don't understand. You asked for opinions on the design. I guess that was just for the first board.
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its only an initial design after the routing there is lots of improvement need ;D ;D
I don't understand. You asked for opinions on the design. I guess that was just for the first board.
im a ask for opinions to further improved my design, gain knowledge from the professional they have much experience than i do ;D and sharing my project to others ;D
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i prefer the 1st design with ZIF socket. and later add a breadboard next to it, not replace it. my 2cnts :)
i already made what you said. i just realize whats the use of ZIF socket if there is already a breadboad. the some disadvantage that i see on the breadboard when you plug or remove the ic, sometime the pins bent or worst destroy the pins of your ic but still depend on handling the ic
ICs are hard to pull off the breadboard specially 40 pins ;D ;D
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I'd make a PCB to plug into the breadboard rather than a PCB to plug the chip into. I don't get that same amount of glee from ZIF sockets that Dave does, but I'm not an EE. They just seem like old technology with PDIP's and chip burners.
(http://www.higginstribe.com/uc/z8e/20090104-ez8-setup-003.jpg)
(http://www.higginstribe.com/uc/lpc1xxx/bmp085/20100308-lpc1114-breadboard-001.jpg)
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its also nice to plug the pcbs on the breadboard but for me the only issue regading this is the availability of Surface mount ICs locally
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i dont find it relevant... the pcb n breadboard... with the smd availability. ???
Try plugging an SMD package directly into a breadboard ;).
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i dont find it relevant... the pcb n breadboard... with the smd availability. ???
Try plugging an SMD package directly into a breadboard ;).
:D :D ;D ;D