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Single ended Fpga To Fpga bus safe speed?

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pacmann:
I want to have a high speed bus between 2 Spartan 6 Fpgas. Whats a safe data clock speed I can use for the bus if single ended? They will be on the same circuit board 10cm away from each other and the tracks are going to be length matched.

pacmann:
Also, I planned a single ended bus 32 bit wide. Is more bandwidth possible with a differential bus 16 bit wide? Is higher speed possible using the same pins but using differential pairs?

dmendesf:
Yes, you can have a faster bus with differential signals. If you used a spartan 6 with high speed transceivers (and connected the right pins the right way with the right impedance...) You could have a few GBps per pair of pins. With common spartan 6 if you connect differential pairs correctly then you can use ISERDES and OSERDES to achieve a few hundred bps per pair of pins.

Bassman59:

--- Quote from: pacmann on August 01, 2021, 11:44:59 am ---I want to have a high speed bus between 2 Spartan 6 Fpgas. Whats a safe data clock speed I can use for the bus if single ended? They will be on the same circuit board 10cm away from each other and the tracks are going to be length matched.

--- End quote ---

We used to do parallel PCI at 133 MHz with 64-bit buses across VME boards, with proper line length matching and line impedance and minding the routing rules about jumping layers. So that's a good data point.

Spartan 6 doesn't have gigabit-rate SERDES but you should be able to run the serial differential traces at their top rated speed across 10 cm of board. Again, mind the impedance and the routing.

dmendesf:

--- Quote from: Bassman59 on August 01, 2021, 11:17:44 pm ---
Spartan 6 doesn't have gigabit-rate SERDES but you should be able to run the serial differential traces at their top rated speed across 10 cm of board. Again, mind the impedance and the routing.

--- End quote ---

Spartan-6 LXT has gigabit-rate SERDES.

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