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Slew rate control in high speed LVDS signals

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I need some method to be able to control the slew rate of LVDS signals with rates from 10MHz to 1GHz. The slew rate has to be variable from 0.1V/ns to 10V/ns in fine steps of 0.1V/ns.
The step size need not be precise but of that order. I have looked at FPGAs with programmable slew rate, but they offer 2 or 3 rates. Not very controllable fine steps.

Any clue how this can be done?

Terry Bites:
I'm not sure if this is a useful response.

You would usually achieve slew control using a transconductance stage with a fixed capacitive shunt load.[attach=1]
This limits the charging current available to the capacitor but not it's final voltage.
Its just a voltage controlled integrator at heart. 
You'll need a very fast and OTA or VCCS for this to work. 

For a serious test instrument build, there is another way: Use high speed ADC(s) and DAC(s) back to back and control the output rise and fall times by changing the input to output clock ratio.
A demanding high bucks build with RF Voodo required.

Signal level is low enough that you can probably get away with a varactor tuned filter.  Mind, this is a linear solution, not slew rate limiting per se.  Given the consistent, small signal level, this shouldn't make much difference.

I don't know what possible application you have though.


What can it cost? Maybe you could build something discrete with current steering into a capacitor with diode clamping and a fast follower, with enough effort.

If your time is precious and you don't need it for very long it might be efficient to just throw a ton of money at it and just rent an ultrafast waveform generator. If your time is precious and you do need it for a while it might be efficient to abuse some high speed DAC evaluation platforms to DIY an ultrafast waveform generator.

LVDS is current-fed, I think it’s +-4mA. So a ‘simple’ :D variable loading capacitor might be effective.

(4mA into 100R termination resistor makes about 400mV.)

M-LVDS transceivers are available which drive double current; they’re intended for use in busses with a resistor at each end. That means they drive 50R load and get similar voltage in the end.


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