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SMD Dpak Fet's and dual Layer PCB cooling.

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dashpuppy:
I have started a new amplifier project and so far its working except for pulling heat from the SMD fet. Over the past few weeks i have bought a few test boards and change the designs a few times, getting better and better. Also learned from this video ( ) That Dave did, and implemented it into my latest design.  I know his video is a little older and things have changed, has anyone got some input and suggestions for me to succeed with my design ?

My goal is to build proper output board to drive 20-48 IRF630 Fets in Class A mode for an amplifier. This 20 fet version works i had it running but heat was the issue with the single layer version of my first board. I assumed ( yes we know what that means ) that i could put a piece of heatsink on the top part of the fet to cool it. ( wrong )


Attached a few photos.


oPossum:
Using a metal core PCB would help with thermal problems. Is there some reason you can't use TO-220/218/247 package?

thinkfat:
Heat sink on the bottom of the PCB? Looks like you put plenty of thermal vias and there's a reasonably large copper plane connected, maybe you just need to add a heatsink to the bottom of the board to dissipate the heat.

Another solution could be to create larger copper planes on the top side and put heatsinks there.

Heatsink on the top of the case is not good enough, as you probably found out, because the thermal resistance to the top face of the package is likely larger than between the silicon and the bottom face.

How many Watts do you need to get rid of?

dashpuppy:

--- Quote from: thinkfat on August 26, 2019, 09:56:31 am ---Heat sink on the bottom of the PCB? Looks like you put plenty of thermal vias and there's a reasonably large copper plane connected, maybe you just need to add a heatsink to the bottom of the board to dissipate the heat.

Another solution could be to create larger copper planes on the top side and put heatsinks there.

Heatsink on the top of the case is not good enough, as you probably found out, because the thermal resistance to the top face of the package is likely larger than between the silicon and the bottom face.

How many Watts do you need to get rid of?

--- End quote ---

Fr 20$ I found out this :)  BUT was well worth it because the rest of the goal worked. I had 30V rails 20VAC on the output with a perfect 1khz sinewave.  20Vac gives about 50watts rms into 8 ohms Class a.  EXACTLY where I wanted to be too!  New boards should be here in a few days. If it fails for thermals i'll go Through Hole units.

My goal is to make about 50-70 watts.  Adding more fets upping the bias will achieve this. ( already proven with IRFP240's ) except the 240's are huge and produce way more power.

Right now each IRF630 produces about 2.5 watts.  Class A I believe is double that in heat so 5watts each ?  x 20 devices.

dashpuppy:
Well, id like to report after re-designing the board to have a HUGE copper plane under the board on each side of the fets with lots of vias, altho next revision will be way better. This second board I did is now running perfectly. I have a few things to learn in Eagle that i want to implement into the next V3 test board..

Stable running 125mv across the source resistors that are 1.0 0hm 5watt. 30V rails.  3.25vac input gives me JUST about clipping at 24.45v VAC on the output. Witch is  74watts RMS Class a. A special thanks to Nelson Pass for making this happen, and helping me with some issues in the beginning :)    :-DMM :-DMM



Pics..


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