Multi-comparator with voltage translation

[NivagSwerdna]

I have been thinking of embarking on my first FPGA project and plan to use ice40lp as this is small and cheap and comes in FQFP

I have 4 inputs that come from a 5V device under test (an old arcade game PCB), each of these inputs is at TTL levels.  Ideally I would not influence the DUT too much.  I would like to be able to sense positive and negative transitions on the input lines at speeds up to 8MHz.

For each input I need to have an equivalent input at the FPGA which shows if the input is TTL hi or TTL lo and it would be nice if it could also sense if the level was neither, i.e. in the ambiguous part between hi and lo.

I thought about using comparators which would require eight (4x2)... If the comparator has a 3.3V power supply does that mean I should not put 5V into its inputs?

Should I use a resistor divider on the inputs?

Or should I have the comparator running at 5V and voltage translate the results instead?

Any pointers would be appreciated, especially to a device that could help.

Thanks in advance

[Zero999]

The LM339 can tolerate higher voltage inputs than the power supply, up to 36V, but only has a common mode range of 1.5V less than the positive supply, so one input will need to be at 1.8V or less, with a 3.3V supply. It's also too slow for your application.

I had a quick flick through Digi-Key and Mouser and found the MAX9108ESD+ and TLV3502, which should be run off 5V.

https://datasheets.maximintegrated.com/en/ds/MAX9107-MAX9109.pdf
https://www.ti.com/lit/ds/symlink/tlv3501.pdf

[David Hess]

I thought about using comparators which would require eight (4x2)... If the comparator has a 3.3V power supply does that mean I should not put 5V into its inputs?

It will require 8 comparators.  Some comparators allow higher input voltages than their supply.

Should I use a resistor divider on the inputs?

Some designs do that.

Or should I have the comparator running at 5V and voltage translate the results instead?

Most comparators do that already, commonly with an open collector/drain output.

[Zero999]

I've just noticed the comparators I suggested above have push-pull outputs. It's quite difficult to find anything which will work at 8MHz, with an open collector output. If the logic input isn't 5V tolerant, the usual series resistor to limit the current through the ESD protection diodes will probably suffice.

[NivagSwerdna]

I have realised that my FPGA has some LVDS pairs... So if I put one side of the pair to a vref then I could feed in the input via a resistor divider?

[David Hess]

I've just noticed the comparators I suggested above have push-pull outputs. It's quite difficult to find anything which will work at 8MHz, with an open collector output.

The LM319 dual 80 nanosecond comparator seems almost ideal and is low cost.  The output is ground referred open collector, but it would require a negative supply.

A comparator with ground referred push-pull output can be made open-collector with a single output transistor and resistor if needed.

I have realised that my FPGA has some LVDS pairs... So if I put one side of the pair to a vref then I could feed in the input via a resistor divider?

Check the input voltage range.  LVDS receivers do not usually operate down to zero volts.

[Kleinstein]

 A possible solution to go from a higher votlage level to a lower voltage level are some logic chips that can tolerate high higher (e.g. 5 V) even with only 3 V supply. 74LVX... would be an option. A possible weak point is that the input transition is still at some 1 V.

Another option for voltage translation the SPDT CMOS switches (4053 or similar).

The LM339 type comparators are OK, but are open collector and thus need extra pull up resistors and thus needs some extra power.
In some cases are just a voltage divider is good enough.