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Some signal tracks need to be routed through vias... but which?

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shadewind:
I'm laying out a dev board which uses the Altera Cyclone IV EP4CE10 in a EQFP144 package. It's a two sided board (yeah I know, 4 layer would be better for this but 2 layer is cheap) and I'm realizing that I cannot fit all the I/O tracks between the decoupling caps on the top side of the board so I will more or less have to (at least as far as I can see) route some of them on the bottom layer by bringing them down with vias. Is there any distinction I should be making here on what tracks should be routed on the bottom side vs. the top side? Or should I just route whatever I see fit on the bottom side from a layout perspective?

deephaven:
In general terms, clocks are the most critical signals. Minimising total track length is more important than whether or not to go through a via, but if you can do it without a via so much the better. Also try to keep clocks away from any other fast signals (data lines).

shadewind:
If my intuition is correct, the reason for this is that a via will mostly add resistance but increased track length will add inductance?

tnt:
It's also a change in impedance because suddenly you have a piece of wire that's perpendicular to the ground plane.

But how fast are your signals ? (rise time & frequencies involved)

jahonen:
I think that if one has two-layer board with many digital signals in it, then the whole impedance thinking is futile, since it is pretty much impossible to get low enough impedance with sane trace widths, tracks would be simply too wide for usual board thicknesses (75 ohms, which is still relatively high, is achieved if track width is about same than dielectric thickness from the ground plane to the trace). Of course if one could make the board 0.2 mm or so thick, then it would work. But for mechanical reasons, it is usually out if the question.

So it usually means that one must simply cram all the required traces somewhere and try to squeeze some ground here and there and hope that it works :) And then later re-design it using proper multilayer board if EMC compliance/RF immunity is required.

Regards,
Janne

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