Spartan 3 Starter Board DAC confusion

[nuhamind2]

Below is a snippet from LTC 2624 datasheet

SDO (Pin 10): Serial Interface Data Output. This pin is
used for daisy-chain operation. The serial output of the
shift register appears at the SDO pin. The data transferred
to the device via the SDI pin is delayed 32 SCK rising
edges before being output at the next falling edge. SDO
is an active output and does not go high impedance, even
when CS/LD is taken to a logic high level.

If SDO always active, how can other pin who share same SPI bu able to send data to FPGA ?. Aren't active mean SDO always drive the conductor which is connected to pin N10 on FPGA ? I think I misunderstood what the datasheet say   

Can someone help me ?

[codeboy2k]

Don't put SDO onto the MISO bus of your SPI controller.  There is nothing to read back from this DAC, it's write only.

That SDO pin is designed for connection to the SDI pin of a daisychained LTC 2624.  The final SDO in the chain can be left floating , or if you don't like floating you can ground it through a 33k or 47k resistor (3.3V or 5V Vcc). This will limit the current to 100uA, which was the digital output test current from the datasheet.

[nuhamind2]

Don't put SDO onto the MISO bus of your SPI controller.

Well,I can't do it. The DAC SDO is tied to the pin N10 on the fpga, not through jumper or anything as I recall. Further more another component onboard, like the ADC dan PGA has their SDO tied to N10 too. I don't understand which part of the datasheet I fail to understand.

This is the board I'm talking bout :http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,792&Prod=S3EBOARD

[mikeselectricstuff]

Don't put SDO onto the MISO bus of your SPI controller.

Well,I can't do it. The DAC SDO is tied to the pin N10 on the fpga, not through jumper or anything as I recall. Further more another component onboard, like the ADC dan PGA has their SDO tied to N10 too. I don't understand which part of the datasheet I fail to understand.

This is the board I'm talking bout :http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,792&Prod=S3EBOARD

SDO tri-states when the device is not selected. So whichever device is selected at the time via the CS input drives the common SDO line.

[codeboy2k]

Don't put SDO onto the MISO bus of your SPI controller.

Well,I can't do it. The DAC SDO is tied to the pin N10 on the fpga, not through jumper or anything as I recall. Further more another component onboard, like the ADC dan PGA has their SDO tied to N10 too. I don't understand which part of the datasheet I fail to understand.

This is the board I'm talking bout :http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,792&Prod=S3EBOARD

SDO tri-states when the device is not selected. So whichever device is selected at the time via the CS input drives the common SDO line.

Yep, that's the way it should be done, Mike.  But it seems that Linear Technologies didn't do it.. I just read the datasheet for the LTC6912 PGA and the LTC1407 ADC.  The PGA does not tristate and even says in the datasheet "DOUT is active in all states, therefore DOUT cannot be “wire-OR’d” to other SPI outputs." But the Digilent designers did it anyways.  They also wire-ored the LTC6912 PGA, which does have a tri-state SDO line, and the OP's original chip, the LTC 2624 quad DAC, which does not tri-state.  So all three chips are wire-ored on the one SPI bus.

So, to the poster, are you having specific problems?  perhaps Digilent built the board this way and it just worked, so they left it, even if it's not the right way to do it.  I suspect that the pullups are weaker than the pull down, so they got it to work.

[nuhamind2]

So far I managed to wite code to send data to the DAC. I haven't run into problem since i haven't write any code to read data from any SPI slave. Anyway I'm gonna experiment with the board and see what actually happen.

I'll post the result here when finished.

Thanks guy.