SR560 build - low noise JFET amplifier

[Martinn]

Hi all,

out of curiosity (I never handled a JFET before) I'd like to build (part of) a SR560 https://www.thinksrs.com/products/SR560.htm low noise preamplifier.
Schematic is available here https://www.physics.wisc.edu/courses/home/spring2020/407/407_Lab_Instrument_Manuals/SR560-low-noise_amplifier-filter/SR560_w_schematics.pdf
some discussion https://www.eevblog.com/forum/projects/can-anyone-take-a-guess-at-the-topology-of-an-sr560-(1mhz-100meg-pre-amplifier)/ - AoE "Designed by Masters"

I guess I'll build the front end and filter section for starters. I thought about replacing the gold contact, dual latching relays (rare!) with switches, but I am not sure about signal quality ones and there are a number of digital lines for the multiplexers anyway.
I am also considering the brand-new JFET pair JFE2140 https://www.eevblog.com/forum/metrology/new-low-noise-jfet-from-ti/ for lower noise. Also AoE suggests lowering the JFET source resistors in order to reduce resistor noise. But I guess the farther I get away from the original design, the lower are chances of success...

Any suggestion from your side? Not sure about the shielding - I'd start with a bare PCB of course, but probably this would need at least an aluminium (or better steel) for electric/magnetic field shielding.
Many parts in the SR560 seem rather pedestrian, seems easy to replicate. Does anyone see parts worth upgrading?

Thanks - Martin

[Kleinstein]

The circuit has very little (essentially no) protection and RF filtering at the input.
The JFE2140 look like a suitable part. It already includes some protection diodes that could come handy.
Lower source resistance makes sense and with the good matching of the JFET2140 chances are also good that it works. This changes to gain / tranconductance and would need changes to the compensation though.

The OP37 is a bit tricky to use as it is not unity gain stable. Unless one really needs the speed I would use a different unity stable one.

For the ciruit it defenitely makes sense to run a simulation.

A big question is which frequency range you are interested in.

2 pole latching relays with glod plated contacts are available as Fujitso FTR-C1  (e.g. from TME.eu) and Kemet EE2/ EC2 series. These 2 types even share the same footprint (at least for the 1 coil version).

[Martinn]

Original bandwidth is 1 MHz, more would be nice but CMRR will drop even more. Also I'd have to redesign the remaining stages as well, so I'd stick with the 1 MHz.

Basic simulation works (LTSpice).

What would you suggest for EMI input filtering? Some chip beads with low enough 1 MHz impedance (in order not to generate more noise)?
I wonder if EMI would be a problem. JFETs are too slow anyway, could be some demodulation generating lower frequency content? Probably this 1980's design did not see many cell phones around initially.

[Kleinstein]

There is a chance that higher frequency signals are  mixed down to additional signals in the useful band. This can happen even for signals for the JFET itself to be amplified well.
Filtering would have to be relatively symmetric to get good CMRR. This could include something like a common mode choke. It is still a balance to not effect the frequency response too much. For the filtering part the source impedance and aimed for input impedance makes a difference.

The other point would be having at least some protection. For the JFE2145 this would be some useful potentials for the diodes already present. The other part can be some series impedance (e.g. resistors in the input path).

I would definietly consider a different OP-amp than the OP37. Not being unity gain stable can cause extra complications.

If a good CMRR also for higher frequencies is relevant, the loop to control the current could be a bit too slow.  I think a more classical current source could improve the CMR.  For a large amplitude CM signal cascode transistors could help. However I am  not sure how this effects loop stability at rather high frequencies. It works great at low frequency.

[Martinn]

If a good CMRR also for higher frequencies is relevant, the loop to control the current could be a bit too slow.  I think a more classical current source could improve the CMR.

Re-reading the description in AoE (p. 515) I think I understand how this is supposed to work: The LF411 integrator keeps the drain average (also OP37 inputs) at 6.2 V. So as long as the LF411 bandwith is high enough, the OP37 does not see any CM voltage at all. So I would think a current source instead of the LF411 would actually make CMRR worse.

[Kleinstein]

A current source at the source side would keep the current constant and thus ideally the same average volatage at the OP37 inputs. The question is only if the current source is fast enough (e.g. low enough capacity).
The LF411 for the fixed constant level has quite high resistors for the inputs. So this loop is more on the slow side by design, even with a relative small C110

The feedback part to make this a differential amplifier with defined gain and not just a high gain amplifier complicates things. Because of this the extra loop with the LF411 may indeed be the better option.
I don't think the CMRR of the OP37 would be the main issue. I would more consider the cúrrent at the FETs and the drain voltage effect on the JFETs and parasitic capacitance to be the main issue. This could especially be the case if the signal source is not low impedance.

[sky2city]

I posted DC test data of my SR560, it may help. 
https://www.eevblog.com/forum/testgear/sr560_noise-calculation/msg5398286/#msg5398286