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| Stabilizing analog read on a potentiometer |
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| ajb:
Two other factors two consider are sampling time and source impedance, especially when the ADC is reading multiple channels in sequence. Excessive impedance (IE, a high-value pot) and inadequate sampling time will mean that the ADC's sampling capacitor will not have adequate time to charge to the new input value before the ADC conversion is started. The datasheet should describe the sampling capacitance and from that and the source impedance you can determine the sampling time required for a given resolution. |
| Siwastaja:
Two different things, with a common solution: 1) ADC input impedance requirement. Say you have a 10k pot, acting as a series resistance. The ADC internally has a tiny (say, 20pF) sampling capacitor which is charged during a tiny sampling period (say, microseconds). It cannot charge completely through your high resistance during that time, so it shows some remaining charge left from previous conversions, causing strange fluctuations. To solve this, you need a low-impedance driver, the options are: a) A very low-value potentiometer (hundreds of ohms max), drawing power all the time, b) opamp buffer c) capacitor (between the ADC input and ground) orders of magnitude larger than the ADC sampling capacitor - say 10nF to 100nF is often just right. The capacitor solution is obviously the cheapest and simplest (and the way to go), but the gotcha you need to know about is that you need to limit the conversion rate (i.e., don't leave the ADC freerunning at highest sample rate), so that the capacitor has time to replenish. Won't work with high-frequency stuff - works great with things you are going to sample slowly anyway (analog human interface devices, temperature sensors, battery voltages...) 2) filtration, for any reason. Now, if you use the cap for providing low impedance, it doubles as an analog RC filter as well. Two flies with one stone! In this regard, using a larger cap than strictly required due to #1 might make sense. So go for values like 1uF, and so on. And, 3) if you still have a problem, consider adding software filtration. An analog RC only works on short timescales (otherwise, MASSIVE capacitors would be required), but a software filter can easily work over seconds or minutes if you need to. A cumulative average (IIR filter) is easy: static int32_t flt = 0; flt = (15*flt + (int32_t)newest_val*256)/16; filtered_value = flt/256; (This example takes 1/16 (6.25%) of the newest value and 15/16 (93.75%) of the accumulated filtered value each time. Input value is multiplied by 256 and the result again divided by 256 to increase intermediate processing resolution.) I'm almost sure your actual problem is simply caused by #1. A very typical catch for the young players, and the datasheets won't always mention this low impedance requirement clearly because they assume you know it. |
| IconicPCB:
In case of AVR ensure thevenin equivalent resistance is less than 10K. |
| David Hess:
You might be expecting too much. The settability of a common single turn potentiometer is about 1 part in 100 or roughly 7 bits. The best ones can achieve 1 part in 200 or roughly 8 bits. So if you are expecting more than about 7 or 8 noise free bits, then forget it. And this limitation gives a minimum goal for how much noise reduction should be done if you accept 7 or 8 bits at the most. If I was starting from a 12 bit conversion, then I would average at least 12-7+1=6 bits of resolution away or 2^6=64 samples. If you still have excessive noise after that, then look for sources in the hardware. Beyond that, various schemes can be used to "divide" the potentiometer's travel into zones using hysteresis which will prevent quantization noise. Modern test instruments often get this very wrong because few bother with human factors engineering. |
| mikerj:
--- Quote from: Sterno on July 19, 2019, 08:29:22 pm ---I have had good luck filtering a noisy analog signal by taking 16 sucessive readings on the ADC, storing these in an array, summing the total and then shifting that result 2 bits to the right. If I recall, method is called "decimate and shift" and is said to preserve accuracy which can be lost through standard averaging. --- End quote --- This is using oversampling to generate more bits of resolution e.g. samplinge 16 times and you get 2 more bits of resolution, providing you have more than 0.5 LSB of noise present. This will not reduce noise in the final value, in fact it will most likely increase it. |
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