Modeling Complementary Current Output in LTSpice

[Evan.Cornell]

Hello, I am looking at AD9102 for use in project. It has complementary current output pins (datasheet says differential, but it is complementary). IOUTFS is about 4mA.

From the datasheet:
The DAC output current equations are as follows:
IOUTP = IOUTFS × DAC INPUT CODE/2^14
IOUTN = IOUTFS × ((2^14 − 1) − DAC INPUT CODE)/2^14
where DAC INPUT CODE = 0 to 2^14 − 1.

My question is this: how can I accurately model in LTSpice this complementary current output, so I can verify the signal conditioning I am putting on the DAC output?

[magic]

Not sure if you need two ideal current sources (F2, search "cur") configured to produce complementary sinewawes/steps/whatever or something more sophisticated?

(It's also possible to generate the complement from a reference source).

[Evan.Cornell]

So how would I configure the sources if AD9102 is set to generate a sine wave, that means IOUTP is only pushing current for the positive half of the output wave and IOUTN is only pushing current for negative half of the output?

[SiliconWizard]

Don't forget to model the output impedance if you want to model things "accurately". The DS states something like 200Mohm.

[mikerj]

So how would I configure the sources if AD9102 is set to generate a sine wave, that means IOUTP is only pushing current for the positive half of the output wave and IOUTN is only pushing current for negative half of the output?

That isn't quite how the outputs work.  In the positive half of the waveform IOUTP will be higher than IOUTN (and vice versa), but both outputs will be sourcing current until you reach a waveform peak/trough when one output will be at zero.

You can use the behavioural current sources in LTSpice to emulate this behaviour, something like the attached circuit.  This is far from a simulation as everything is ideal.