For small I_out you'd generally scale dI_L down, as well, so that dI_L is some percentage of I_out, typically something around 30-50%. What this means is you need to scale the inductance up when you scale the output current down, which may seem counter-intuitive first. On the other hand, you can scale the inductor current rating down.
But if you think about it closer, it makes sense. Current ripple is dI = V/L * dt, but energy stored in the inductor is E = 0.5*L*I^2, see the square of the current. This means, if you scale down the output current to 1/10th, and hence, scale dI_L down to 1/10th as well, and you want to scale energy stored in the inductor to 1/10th as well, L needs to go up by 10x!
(For really robust design practice, you should select the inductor saturation current based on the current limit of the chip, not the calculated steady-state peak inductor current. This makes it rather difficult to obtain small output currents with the available ICs: you are limited in IC choice and may need to pick something with fixed, say, 2-3A worst-case current limit, when you'd actually want to design with a current limit somewhat above your actual steady-state peak inductor current. Luckily, the current limit circuits tend to be fast enough so that losing some inductance due to saturation doesn't automatically mean device destruction - as long as you still have some -, so you can escape this "robust" design requirement a bit. Additionally, "abusing" a larger current converter IC to do much smaller currents than it's designed for, now means you have excessively large MOSFETs compared to the increased parasitic resistance (mostly from the larger L), so it has better chances of surviving core saturation, resistively limiting current.)
For really low-current converter, I would try to find the regulator IC with the lowest specified switch current limit! Some have adjustable current limits, but they tend to have much more pins anyway and may require other external components as well.