Electronics > Projects, Designs, and Technical Stuff
STM 32 Streaming ADC Data continuously through UART
<< < (3/3)
poorchava:
Aside from 2 samples being from differents points in time, nothing bad should happen. In general DMA operations are atomic and UART has a TX register, so a DMA transfer to the memory location will not mess with UART transmission. If you run both UART and ADC via DMA, the DMA will resolve the potential conflict, as it has automatic arbitration mechanisms (if it even will have to, i can't recall if there are or not separate write and read ports on that uC).

Cortex M4 and M7 have some serious gotchas when using DMA when there are cache memories enabled. I can't recall the name for that cache mode, but essentially the cache contents do not get invalidated automatically when thereis a DMA transfer to the original place in memory. So when CPU uses data that was cached and that data is overwritten in main memory by DMA transfer (eg. from AURT or ADC) the CPU may still read the old values). I don't know form top of my head if the M4 in F302 evenb has cache, btw.
Navigation
Message Index
Previous page
There was an error while thanking
Thanking...

Go to full version
Powered by SMFPacks Advanced Attachments Uploader Mod