Hi, looking for feedback on my second board design (first one was a
1-Wire DS18B20 board posted separately). This one is different — I2C
over a 2–5m shielded cable with a bus repeater.
XIAO ESP32-C6 carrier board, 2-layer ENIG, 35×45mm, KiCad 10, JLCPCB
assembly. XIAO hand-soldered after PCBA (castellated pads). USB-C power
only.
Reads an SHT45 humidity/temperature sensor via I2C. Cable is 2–5m,
4-wire shielded silicone. PCA9617ADPJ I2C bus repeater extends the
range (rated 30m, I use 2–5m). Separate filtered power rail (VCC_PROBE)
through a 600Ω ferrite for the probe side.
Signal chain (connector → MCU):
J1 (SDA/SCL) → TVS1 (ESD7351HT1G, 0.5pF) → CM choke 90Ω@100MHz
→ ferrites 600Ω (FB2/FB3) → 2.2kΩ pull-ups (probe-side)
→ USBLC6-2SC6 dual ESD
→ PCA9617A repeater (probe ↔ MCU)
→ 4.7kΩ pull-ups (MCU-side) → XIAO D4/D5
Design choices I'd like validated:
1. TVS: ESD7351HT1G (0.5pF) instead of UCLAMP3301D (50pF) — low
capacitance for I2C. Right call?
2. Pull-up split: 2.2kΩ probe / 4.7kΩ MCU — stronger pull-up on cable
side to handle capacitance up to 10m. Makes sense with PCA9617A?
3. Protection order — TVS → CM choke → ferrites → ESD → repeater → MCU.
Anything wrong?
4. Any layout issues visible on copper/3D?
Schematic, 3D render and copper layer attached.
BOM:
100nF - C1 C3 C4 - 0805 - C49678
10µF - C2 - 0805 - C15850
1µF - C5 - 0805 - C28323
600Ω Ferrite - FB1-FB3 - 0805 - C1017
4.7kΩ (MCU) - R1 R2 - 0805 - C17673
2.2kΩ (probe) - R3 R4 - 0805 - C17520
ESD7351HT1G (TVS) - TVS1 - SOD-323 - C19829399
CM choke 90Ω - FL1 - 0805 - C964097
B4B-PH-SM4-TB - J1 - JST PH - C160354
USBLC6-2SC6 - U2 - SOT-23-6 - C2687116
PCA9617ADPJ - U3 - TSSOP-8 - C128388
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