For example, if the input voltage is 3.75V (as per specified minimum), required minimum output before the ESP brown-outs is, say, 3.0V (an assumption; I don't know the actual requirements), and the drop-out voltage of the LDO is 0.3V, you have a headroom of 0.45V.
Now, if the capacitor needs to supply 95mA of current (170mA required; 75mA from the supply) during a burst 10 milliseconds long (just an example, verify the actual timing), the required capacitance would be
C = Q/dV = I*t/dV = 95mA*10ms/0.45V = 2111 uF.
So should be doable with a 4700uF cap! But beware on that 10ms assumption. The burst length alone is also of little interest if the worst case burst-to-burst interval isn't known. Because if that 75mA is close to the average current, charging the capacitor is slow between the bursts.
And indeed, if you aren't allowed to exceed that 75mA, then the "simple" just-add-a-big-cap option is out of question, and you need current limiting.
If you really want to limit the input current to exactly no more than 75mA - and I think the average consumption of ESP module might be quite close to that - I see no other choice than purpose-built converter, very low-drop switch-mode or linear, that uses feedback from the input current to actively limit the capacitor charging, to the point it may lose the output regulation if the capacitor isn't big enough.
Semiconductors are small and cheap now; energy storage is expensive. If I had to design that beast, I might consider quite complex ideas such as first boosting the 4V up to intermediate voltage for the capacitor link, then buck it back to 3V3, to maximize energy storage, to increase that dV in the equation above. You could easily get away with a, say, 1000uF 10V capacitor with a lot of headroom to spare. But this solution isn't easy to implement unless you are an experienced designer.
Passive current limiting solutions, such as NTC, I would otherwise recommend looking at, but your voltage headroom is just so minuscule. (It's ridiculous that people are even talking about 1117 when the maximum dropout you can deal with is 0.45V.) NTC needs to run hot, wasting energy, seen as voltage drop, to maintain its lower on-resistance; it's of course less lossy than a fixed-value resistor, but only by maybe an order of magnitude max.
Any classical linear current regulation circuit would mean additional voltage drop of at least 0.3-0.4V, leaving no dropout for the voltage regulator.
I'm afraid a simple solution to limiting current does not exist, you need to do some serious design work for it.