Author Topic: Strange 10 Layer Stack up (Layer stack)  (Read 1120 times)

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Offline msimunicTopic starter

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Strange 10 Layer Stack up (Layer stack)
« on: June 21, 2021, 04:16:33 pm »
Hi all,

I came across a strange stackup. It's strange to me because I don't have much experience in defining PCB layer stackup.

As I want to learn more about topic, and based on this stackup, I have questions about defining layer stack.
What exactly is guiding idea behind layer stack?
   - To define specific impedance using specific trace width and achieve impedance matching - between which Copper layers?
   - When and why Core is used?
   - When and why Prepreg is used?
        - Why Two Dielectrics one on top of another, together form dielectric, but why in such a way?

Thanks.
 

Offline nctnico

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Re: Strange 10 Layer Stack up (Layer stack)
« Reply #1 on: June 21, 2021, 04:26:58 pm »
I must say that having core on top of prepeg seems quite unusual to me. Other than that this stackup screams matched impedance connections on most of the layers.
There are small lies, big lies and then there is what is on the screen of your oscilloscope.
 

Online ajb

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Re: Strange 10 Layer Stack up (Layer stack)
« Reply #2 on: June 21, 2021, 07:19:32 pm »
Maybe core on prepreg was the best way to get the desired spacing/total stack thickness within the manufacturer's standard materials? 

It looks to me like this used to be a 12-layer stack with two more copper layers between the core and prepreg, and whoever turned it into a 10-layer stack by deleting those layers just didn't bother fixing the dielectric layers.  If that's the stackup definition in the EDA tool (looks like Altium's layer stack colors) then it may not be consequential.  The designer may have intended to use one of the fabricator's standard stackups which can simply be specified in the PCB order, or they might have a separate document specifying the stackup in more detail--in either case they just need to make sure the fabricator puts the layers in the right order.  Otherwise it doesn't really matter what the EDA tool thinks the stackup is unless you're using it for SI simulation or something. 
 

Offline msimunicTopic starter

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Re: Strange 10 Layer Stack up (Layer stack)
« Reply #3 on: June 21, 2021, 08:57:33 pm »
Thanks on great answers.

If someone of you little bit more experienced would start to defining layer stack, and you want to have some certain impedance, how would you start?
From which parameters?
 

Offline poorchava

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Re: Strange 10 Layer Stack up (Layer stack)
« Reply #4 on: June 22, 2021, 07:11:41 pm »
Sometimes when discussing a stack up with a PCB things may go like this:
-you have a 0.44mm prepreg. We don't have that on stock, lead time is 4 weeks.
-won't do, we need that in 2 weeks
-we have some single sided copper 0.24 core and 0.2 prepreg on stock.
-whatever works, as long as I get 0.44mm, since the DDR layout is already done.

Been there, done that. Stack up was 4 layer though.
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Online ajb

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Re: Strange 10 Layer Stack up (Layer stack)
« Reply #5 on: June 23, 2021, 03:21:37 pm »
Thanks on great answers.

If someone of you little bit more experienced would start to defining layer stack, and you want to have some certain impedance, how would you start?
From which parameters?

Well, you'd start by looking at all of the impedance targets you need to hit, and how many layers you need to be able to route the board.  If your project is low volume or cost sensitive, you will probably look at your PCB fabricator's standard stackups, which should include the spacing and dielectric constant of the insulating layers.  From the dielectric constant and insulation thickness you can calculate the required track widths (and spacings for differential pairs) for the impedances you need.  You need each controlled impedance layer to be paired with one or two plane layers, so you would need to define which layers will be planes and which signal, and usually about half of the layers end up as planes.  Different insulating layers may be different thicknesses (especially on 4/6 layer boards), so the required track widths may be different for different layer pairs, which you will need to account for, depending on how big the difference is and how strict your impedance requirements are.

If you have a really complicated board, you might need to define a custom stackup.  There's a bit of art to this, since you're balancing the technical needs as well as cost, and you may have to account for other things, like blind/buried vias, which require specific fabrication processes and affect how your can move signals around on the board.  You might also need to use a less common dielectric material, particularly for RF or really sensitive circuitry, and this will affect what stackup options you have and how much it all costs.

Your original question about why core and prepreg materials are used comes down to how the board will be fabricated.  The copper layers need to be exposed in order to etch them, so multilayer boards are made up from multiple cores, which are made of a dielectric material with copper foil on one or two sides.  Each core has its copper etched, and then the cores are stacked with prepreg between them, and the whole stack is pressed until the prepreg fuses with the cores and you end up with a solid multilayer stack.  Layers can also be added by applying copper foil to prepreg, which is common for the outer layers on multilayer stackups.  On a basic stackup the drilling and through-plating is done at the end, so all cores get drilled at once, but on more complicated boards with blind/buried vias there may be drill/plating steps on individual cores or on partial stacks of cores before the final stack is assembled.  So if you need blind/buried vias between particular layers, this will affect the order in which the stackup will be fabricated, and which dielectric layers are core versus prepreg. 
 
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Offline Guy Shemesh

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Re: Strange 10 Layer Stack up (Layer stack)
« Reply #6 on: June 24, 2021, 10:24:23 pm »
I separate the answer in three:

- First you don't have to be a stackup expert in order to specify impedance for your board. If you have specific traces that need impedance matching you can give them some unique trace thickness (so that the manufacturer can easily find them), and in your fab notes you request impedance matching. Leave it to the manufacturer to calculate for you, they do it all day and they know which material they stock  and what is its dielectric constant.
If you have differential pair impedance you need to keep them at the same widths and with the same separation in your design, and again ask the manufacturer to match them for you by adjusting the line width and laminate construction. I wouldn't let my manufacturer do more than that, i.e move lines etc.

- Seems like your question is more general than just matching impedance. I highly advise reading a guide about PCB construction. You spent some time but it really pays off to understand about PCB design and via type options, and you'll get better at it. Here is a guide I'm working on, I hope it will help you - PCB via guide

- Regarding the Altium screenshot, many times Altium throws at you some meaningless stackup designs like here that we see a prepreg over a core (and cores usually come with copper cladding on both sides). Cores also cost more, PCB fabricators would definitely not like it.

Good Luck
   
« Last Edit: July 22, 2021, 02:40:58 pm by Guy Shemesh »
 
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