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Struggling with soldering PG-TSDSON-8

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wraper:

--- Quote from: T_guttata on November 15, 2021, 08:04:53 pm ---
--- Quote from: wraper on November 15, 2021, 08:54:56 am ---About pad on the corner, examples where soldering is shown use a PCB different layout to bare pads shown.

--- End quote ---

Don't know what you intend to say? I have used the footprint various times and the vias are not always placed the same.

--- End quote ---
That soldering issues on examples do not represent via locations as shown on the footprint, so your argument

--- Quote from: T_guttata on November 14, 2021, 09:55:56 pm ---Hm, is this a common design rule not to place any vias in pads? But this would rather result in too little solder than too much?

--- End quote ---
is not quite relevant towards my previous comment. As I have not seen an example of soldering with particular via placement.
When you get solder sucked into via, part gets pulled towards pcb in that patricular location. Which may cause solder squeezing out in other locations without vias where solder has no other places to go to.

tooki:
1) I don’t think the alloy is the problem here. If the component is riding up on the solder, it either a) hasn’t melted fully (up which is unlikely with your low-temp solder), or b) there’s too much solder (which is VERY easy to do, especially with small parts).

If I had to place a bet, I suspect that applying a lot less solder to the large pad would solve the problem. The vias in the pads simply make it harder to determine the right amount, since some pads will suck up more solder than others. With that said, err more on the side of less solder than of more. The issue here is that some pads have too little solder, others have too much. The vias are one issue, as said, but paste application is likely another issue.

What t3sl4co1l said about the stencil needing to be perfectly flat against the board cannot be understated: if it rises even just a fraction of a millimeter, you WILL apply much more solder than intended. It takes practice to get a good technique that doesn’t smoosh paste under the stencil. The angle, pressure, and speed of the squeegee (as well as its material; IMHO metal is better) make a difference.

If a paste print isn’t perfectly clean, clean the PCB and the stencil and try again. If there’s any paste residue on the bottom of the stencil it will cause a gap allowing excess paste to be applied.

2) The D2PAK package (and its many close relatives, like DPAK and LFPAK56) are far easier for a beginner to work with, since they’re bigger, and can easily be hand-soldered.

tooki:

--- Quote from: wraper on November 15, 2021, 10:08:51 pm ---
--- Quote from: T_guttata on November 15, 2021, 08:04:53 pm ---
--- Quote from: wraper on November 15, 2021, 08:54:56 am ---About pad on the corner, examples where soldering is shown use a PCB different layout to bare pads shown.

--- End quote ---

Don't know what you intend to say? I have used the footprint various times and the vias are not always placed the same.

--- End quote ---
That soldering issues on examples do not represent via locations as shown on the footprint, so your argument

--- Quote from: T_guttata on November 14, 2021, 09:55:56 pm ---Hm, is this a common design rule not to place any vias in pads? But this would rather result in too little solder than too much?

--- End quote ---
is not quite relevant towards my previous comment. As I have not seen an example of soldering with particular via placement.

--- End quote ---
I think your (generally quite understandable) English is having a bad day today; I can’t figure out what you mean, either!



--- Quote from: wraper on November 15, 2021, 10:08:51 pm ---When you get solder sucked into via, part gets pulled towards pcb in that patricular location. Which may cause solder squeezing out in other locations without vias where solder has no other places to go to.

--- End quote ---
To be very clear, it’s not that the via is sucking the chip down, it’s that the excess solder on the other pins is lifting the chip up. I say this because the same effect happens whenever you have excess solder on a pad, even if none of the pads have vias.

wraper:

--- Quote from: tooki on November 15, 2021, 10:18:28 pm ---
--- Quote from: wraper on November 15, 2021, 10:08:51 pm ---When you get solder sucked into via, part gets pulled towards pcb in that patricular location. Which may cause solder squeezing out in other locations without vias where solder has no other places to go to.

--- End quote ---
To be very clear, it’s not that the via is sucking the chip down, it’s that the excess solder on the other pins is lifting the chip up. I say this because the same effect happens whenever you have excess solder on a pad, even if none of the pads have vias.

--- End quote ---
Yes it is sucking the chip down with almost zero distance to PCB left due to surface tension/capillary action. If there was no solder paste at all on the pad with via to begin with, chip would sit straight, holding on other pads. It's not an excess solder, it's almost no solder on the pad with via what causes the issue. Once the part does not sit straight due to lack of solder on some pad, then you likely will also have solder squeezing out from some other place.
https://www.eurocircuits.com/pcb-assembly-guidelines-solder-escape-wick/

T_guttata:
To reduce the amount of speculation, I just soldered again one mosfet and made some pictures with my lovely new microscope :-)

In this case, there is only one via inside a pad, but judged just by optical inspection I would say that this parcitular pad is not the problem?

How do you judge the amount of solder? The stencil is 0.18mm in thickness and I pressed it flat while applying the solder.

I heated the pan until I measured 200°C at the PCB surface and then let it cool down. It took about 1.5 mins to get to 200°C.

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