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Suggested low pass filter for a DAC
peter-h:
What would be the best approach for filtering this stepped sinewave
https://www.eevblog.com/forum/microcontrollers/32f417-a-cunning-way-to-reset-two-dma-pointers-from-an-edge-on-a-pin-etc/msg3841010/#msg3841010
I reckon Sallen-Key is probably the most effective, using just one op-amp.
I also need a gain of 2x (Ra=Rb) so C1 is likely 0.5xC2, but beyond that I am not sure, apart from trying out different values.
It is 400-500Hz and 64 steps per cycle. I can go to more steps and obviously that makes it easier but there are issues which drive 64.
I would like the phase lag variation between 300 and 600Hz to be less than 1 degree - because I am compensating for it by shifting the sin(x) table. I think this can be achieved but mainly by having the -3db rolloff well into the kHz range.
T3sl4co1l:
Phase or gain flatness: pick one. Flatter phase in the passband leads to peaked gain at the transition frequency. For a minimum-phase (standard all-pole) filter, anyway.
Flatter phase through the transition band, leads to soft gain rolloff. Bessel is defined as minimum group delay, which in turn is defined as dPh/dF, so the phase changes more gradually for that type. Note that phase still has to go through whatever range corresponds to the filter order (through transition to stop band), so you can't have flat (as in constant for all frequencies) phase, and filtering at the same time.
Or, you delay the passband to slow it to match the stopband delay, which obviously doesn't work all the way down to DC, but is technically applicable for bandpass filters. You can have basically any phase shift at any frequency, using all-pass filters (while keeping flat gain), but not minimum phase: you can't speed anything up, of course, you have to slow everything else down.
The whole question seems academic since, as you say, you'll use a compensation table. Maybe you just want the sharp corners to propagate correctly (when settings are changed suddenly)?
BTW you can get a 3rd order for free, put an RC out in front. This changes the input impedance to the rest, so all the values have to change of course.
Also, MFB has better high frequency attenuation than SK (N-1 poles direct to GND, whereas SK has the feedforward path R1-C1), but is inverting. (Since you're generating a sine, I don't see why it can't be complemented automatically, but whatever.) MFB is also less sensitive to component values/tolerances than SK; but the difference isn't enough to matter for such a low order filter. I have no problem using either, here -- this is just informational, really. If you have further requirements, maybe it would motivate one over the other.
64x sounds like a rather low sample rate, especially for such a capable MCU. But I haven't been following that thread, I don't know. To get rid of the steps, you need a cutoff somewhere between [intended signal] and Fs/2, and enough attenuation by >Fs/2 to get the steps smoothed out (time-quantization noise down to noise floor, say). This defines the filter order and sample rate. Oversampling is great value to reduce analog requirements, allowing a lower order filter.
Tim
peter-h:
I am trying to remove the steps.
The variation in the frequency will be very slow - over minutes or hours.
I can generate >1000 samples with the hardware, before running out of the DAC feed rate limit (DAC settling time). The reason for just 64 samples is because I am doing some amplitude variation and this needs recomputing the whole table. I won't be computing sin(x) of course; I will use a lookup table with 64 values and just doing a multiply; the 32F4 is 1 clock cycle for an int32 or single float multiply.
If something turns out to be really hard I can go to 100+ samples but would prefer not to.
What corner frequency would you suggest I start with?
Indeed I can get a 3rd pole wth just an RC, and the DAC is buffered in this case (with some sort of primitive x1 op-amp) which helps.
Also I wonder about which op-amp. Some reading suggests it needs to work at 100x the corner frequency, and the old LM358 is probably too slow. OP27 is better, OP37 better still but not stable below a 5x gain, but I want a single supply device. Obviously there are loads... The DAC output swings from +0.25V to +2.25V so the op-amp output will go from +0.5 to +4.5V. I have a 4.7V supply available :) or could use a DC-DC converter to get -15V and +15V.
srb1954:
--- Quote from: peter-h on November 30, 2021, 08:54:26 am ---I am trying to remove the steps.
The variation in the frequency will be very slow - over minutes or hours.
I can generate >1000 samples with the hardware, before running out of the DAC feed rate limit (DAC settling time). The reason for just 64 samples is because I am doing some amplitude variation and this needs recomputing the whole table. I won't be computing sin(x) of course; I will use a lookup table with 64 values and just doing a multiply; the 32F4 is 1 clock cycle for an int32 or single float multiply.
What corner frequency would you suggest I start with?
--- End quote ---
If you using 64 steps per cycle theoretically there will be practically no harmonics until the 63rd and 65th providing the step sizes are exactly right and the step timing is exactly right. However, if there is any variation in the step timing (due to jitter) or inaccuracy in the step sizes (due to DAC quantiation error etc) then the lower harmonics will reappear in varying amounts.
Your best option would be to do an FFT on the unfiltered output to determine its harmonic content and determine how much that harmonic content has to be reduced by filtering. Knowing those parameters and your phase distortion requirements you could then pick a filter characteristic to suit.
peter-h:
I can't get the LeCroy 3034 to do a meaningful FFT (the values I enter just keep resetting themselves) but my old Tek 2004B produces this
which shows the first harmonic at 500Hz x 64 as expected. It is almost 40db below the fundamental which I think is 10000x(?) below.
With 128 samples it is 2x further out as expected and is slightly smaller.
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