Author Topic: Super NES on FPGA  (Read 1540 times)

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Offline Dukov AhzrukhalTopic starter

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Super NES on FPGA
« on: April 25, 2019, 03:44:20 pm »
Hello everyone, I've recently finished implementing a TRS80-MC10 home computer on an FPGA, and was thinking of ideas for my next project. I thought of the NES but that has been done already, so I decided to go for the super NES, because who does't want to play Castlevania on a an FPGA board? For my previous project I was able to get all the information I needed right from the service manual, but obviously for a Nintendo system it wont be that simple. Does anyone here have any info on the Super NES or know where I could start looking? A quick google search didn't give me anything useful...
 

Online wraper

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Re: Super NES on FPGA
« Reply #1 on: April 25, 2019, 03:49:05 pm »
SNES was already implemented in FPGA multiple times.
 

Offline james_s

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Re: Super NES on FPGA
« Reply #2 on: April 25, 2019, 03:53:18 pm »
I think there's a SNES core for the MiSTer, I don't know how polished it is though.

Did you share your TRS80 project? If you're looking for stuff to make you might look st early arcade games, we can always use more of those. I've been slowly working my way through the B&W Atari games.

http://github.com/james10952001
 

Offline Dukov AhzrukhalTopic starter

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Re: Super NES on FPGA
« Reply #3 on: April 25, 2019, 04:00:04 pm »
I have not shared my TRS80 project because there is a minor bug in the CPU that causes the BASIC interpreter to give a type mismatch error any time you try to use addition or any other math function. I was going to share after I fix that sneaky bug. I did post the CPU on OpenCores after I translated it to SystemVerilog. It was originally written in VHDL. I did get Pacman and other programs written in assembly to run flawlessly though, so if there's enough interest I guess I could post it as it is. 
 

Offline T3sl4co1l

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Re: Super NES on FPGA
« Reply #4 on: April 25, 2019, 04:07:43 pm »
There should be a pretty good amount out there... may not be easy to search for, as rare information tends to be.  If nothing else, consider using the code (possibly a direct port, say if you were to use System C?) from emulators, which are very accurate these days.

Those are, in turn, based on arcane knowledge, both hard won from hacking and reversing the real hardware, and from leaked developer documents.  I don't know how much of both (I know N64 has a fair bit of both, and that Nintendo is keen to keep that information under wraps, in part due to contractual obligations?).  Join a developer board and see what they can refer you to. :-+

The core itself is probably already out there, the 65C816.  I don't know if there were any special extensions added for the SNES though.  The graphics and IO of course are the hard part.

Of course, an emulator's output will end at the frame buffers (for audio and video), but you might not be doing NTSC output anyway, for practical reasons (i.e., VGA or HDMI for better compatibility these days), so that should be a fine place to pick up from.

Hm, on that note, I don't know offhand if there was any commercial use of NTSC (or PAL) trickery -- that is, drawing pixels in high resolution, of different intensity, to create more colors than normal.  I don't know offhand if the SNES's graphics even had a high resolution mode, but I do know it's got plenty of available colors so it shouldn't really be a problem..  (This would only be a concern with respect to producing all the colors the hardware could possibly generate, if it can produce a fast clock at all -- a good example of this is the PC-emulator-breaking 8088 MPH demo for IBM 5150 PC, that uses obscure CGA text modes to produce up to 1024 colors on the NTSC output -- but not on the component CGA (RGBI) output.  Because trickery.)

Good luck, sounds like an interesting project!

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 

Offline helius

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Re: Super NES on FPGA
« Reply #5 on: April 25, 2019, 04:14:08 pm »
The SNES does use "stipple transparency", which looks best on CVBS composite screens. This is where every other pixel is sourced from the background layer, which makes the foreground object look translucent. The best known use of the effect is in "Super Mario World". It was used on some other systems, too.
 

Offline Dukov AhzrukhalTopic starter

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Re: Super NES on FPGA
« Reply #6 on: April 25, 2019, 05:47:43 pm »
In the past I've used an emulator called ZSNES, it works pretty well and its open source. Converting it to HDL would be a real challenge though, since I pretty much have no idea of how the SNES works. I'm sure I can figure out the CPU part, but it would be great to have some info on the display chip so I at least have an idea of what I'm doing before I start translating. I'll probably write this in SystemVerilog, unless someone can think of a good reason to use something else.
 

Offline james_s

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Re: Super NES on FPGA
« Reply #7 on: April 25, 2019, 06:26:11 pm »
You don't want to try to convert an emulator to HDL, emulators tend to work very differently than the real hardware but they can give you clues as to how the hardware works.

Choice of HDL comes down to which one you know. I know VHDL so I use VHDL, but they all do the same thing.
 
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