Delay in simple PNP over current protection/detection

[b_force]

For a simple DC boost circuit I needed some kind of over current protection.

Nothing to fancy, just something to keep things protected.
So I just came up with just very simple PNP circuit as a OC current protection.
The output of the PNP goes to another part of the circuit.

The schematic is heavily simplified version of the real circuit.

Anyway, the issue I am having, is that de capacitors causes some (obvious) extra charge current.
Which is just enough to trip the PNP sometimes.
I can set the threshold value a bit more loose, but I was wondering if it's possible to delay the whole PNP current detection just by a bit?
Just enough to the initial spike of the charge current is gone basically.

I have been playing around with some ideas, but nothing seems to do any good, unless I have to add some extra big caps etc.

[Marco]

Is this an over current detection circuit and not an over current protection circuit? Even then, what is R4 for?

[Terry Bites]

Simplified as in missing a current limiting function?

[b_force]

Is this an over current detection circuit and not an over current protection circuit? Even then, what is R4 for?

R4 is to ensure proper bias and switching off.
It does work without, but often an high values resistor is advised at this position.

[b_force]

Simplified as in missing a current limiting function?

No idea what you're trying to ask?

The current is being triggered by (roughly) I=0.6/R

Anyway I am not asking if this circuit works, it's a pretty old standard circuit as far as I know.
I am just looking for some ways to delay it slightly.

[DavidAlfa]

R4 is dedundant as you already have R1/R3?
The impedances are small, so you'll need either using huge capacitors or additionally circuitry to provide the timing.
A simple 555 monostable should do the job simple and easy, or a op-amp.

Otherwise, doing with discretes takes a lot more work.

I'm not even sure this will work correcty.
Emitter-base reverse breakdown voltage is usually limited to 5V, Q5 might not be happy in the instant the base is pulled to gnd, the emitter will be at 12V as C1 is fully charged.

[b_force]

R4 has a high resistance value, so it is definitely not redundant, it's not even doing the same thing?
It's just a good idea to have a base emitter resistor to make sure the PNP turns off fully.

There is no more space on the board for anything much bigger than this.

But anyway, I think I just figured it out, a 4.7-10uF cap between the base and the collector will do the job just think I think.
That's available in a 0805 as well.

[Benta]

It's still unclear what the circuit is supposed to do.
Is it an overcurrent detector?
Is it a current limiter?
What's the open collector supposed to do?

[moffy]

The transistor Q1 switches when the B-E junction exceeds roughly 0.6v, enough to turn it on. This happens when there is enough current through the resistor network R1,R3 and R4, at least as shown, mainly R1 with R3/R4 acting as a voltage divider if they are >> than R1. When Q1 turns ON it provides a turn off pulse , through its collector, to the overcurrent circuit, stopping the overcurrent.

[b_force]

It's still unclear what the circuit is supposed to do.
Is it an overcurrent detector?
Is it a current limiter?
What's the open collector supposed to do?

The current vs switch voltage graph is right there?

If you hook up a resistor to the PNP you can use that trigger voltage in your circuit to detect and protect an over current situation.

edit: For example, something like this.
M1 can trigger some kind of other circuit, switch on/off something etc etc.

[b_force]

The transistor Q1 switches when the B-E junction exceeds roughly 0.6v, enough to turn it on. This happens when there is enough current through the resistor network R1,R3 and R4, at least as shown, mainly R1 with R3/R4 acting as a voltage divider if they are >> than R1. When Q1 turns ON it provides a turn off pulse , through its collector, to the overcurrent circuit, stopping the overcurrent.

In theory you can leave out R3 and R4, in practice I have noticed that R4 is needed to ensure full turn on/off of the PNP.
R3 can be handy just to tweak it a little, or on some cases a capacitor parallel to R4 is being used to act as a low pass filter to filter out any switching noise coming from the power supply.

[moffy]

I have used the circuit previously, and even provided some bias at the base of for example your Q1 to reduce the turn on voltage, and thereby the value of R1 can be lowered. But the problem of course is the voltage drift with temperature, the -2mv/C, which gets exacerbated by dropping the turn on voltage.

[MasterT]

Why not use JFET instead of PNP?  Something like 2sk2394 has GS-off 0.7V

[moffy]

JFET's have such a wide variation in Vgs-off that it wouldn't be practical without selection. Also the gm of bipolar transistors is higher than that of  JFETs giving them a better switching transition.

[ledtester]

As I understand it, the OP has a detection mechanism but wants the signal to be active for a length of time before it is deemed a real over-current situation.

Some questions...

- What is going to be receiving the over-current signal? A microcontroller?

- Are you concerned about delaying the over-current signal only when the power supply is turned on (like due to inrush current) or all the time?

- What about this idea... a transistor is kept in conduction by a low PROT signal and shunts a timing cap. When the PROT signal goes high the timing cap is allowed to charge and affect the output signal.

[b_force]

JFET's have such a wide variation in Vgs-off that it wouldn't be practical without selection. Also the gm of bipolar transistors is higher than that of  JFETs giving them a better switching transition.

this!

As well as being able to get a NPN-PNP combination in one nice little SOT-363 package.
There are even PNP-NMOS combinations available!

I have used this kind of over current detect before, even for high current.
The temp drift isn't that bad in practice.

Obviously this isn't a super high precision way of detection/protection over current, but often that's also not needed.
It's just there to make sure things aren't going super bad at a cost of a few cents at most.

I have even seen this little circuit in some very expensive Class-D power amplifiers.
So if it's good enough for them, it's really good enough for this! 

[AndersJ]

This seems like a classic XY problem.

Time is wasted discussing a proposed solution to a ill defined problem.

First define WHAT the problem is.
Then discuss HOW it might be solved.

[T3sl4co1l]

This is fine.  Presumably:
- You have a pull-down on PROT, and preferably a Schmitt trigger as well
- Assuming R1 is a low-value (shunt) resistor
- And R3 is some resistance to limit Q1 base current under fault conditions (say 1k, maybe lower like ~100R if PROT needs to carry a lot of current)
- And C1 is the incidental (bypass) capacitance of the load, which might also be switched on/off externally (not shown)
- And V1 is always on while monitoring is needed.  Note that switching in a precharged C1 with V1 off (backflow condition) would violate this assumption, or a short circuit sufficient to cause V1 to collapse.
- Which further assumes V1 is a fairly good voltage source, as the ideal SPICE symbol might imply.

Then, R4 --> inf is likely fine, as R1 and R3 will provide adequate turn-off / discharge when below threshold.  And delay can be introduced by simply capacitance in parallel with (or in place of) R4.

This is quite a list of assumptions, but they are pretty likely, and the application isn't particularly uncommon, if I understand the purpose correctly.

Which...

This seems like a classic XY problem.

Time is wasted discussing a proposed solution to a ill defined problem.

First define WHAT the problem is.
Then discuss HOW it might be solved.

...If the above assumptions prove incorrect, then this is spot on!

Which is to say: I feel the above assumptions are reasonable enough that, calling into question the overall purpose probably isn't needed; but, more information is always, always welcome.

Tim

[b_force]

This seems like a classic XY problem.

Time is wasted discussing a proposed solution to a ill defined problem.

First define WHAT the problem is.
Then discuss HOW it might be solved.

The problem isn't ill defined, the ability to read is.
Everything is already defined, explained and mentioned in the first few posts, incl even an additional schematic for those with very little imagination.
(see post number 9)

Besides, for this problem I just except certain level of knowledge or (mostly) experience.
This little over-current detection/protection idea has been around for ages and used in many many circuits.
(at least has been seen in plenty magazine like Elektor and such)
The circuit is right there, so it's very easy to simulated on prop it op on a breadboard if you feel like being productive and constructive

If this circuit is not familiar or you don't feel being constructive or read anything at all, than just simply don't bother posting and move along instead of trying the be a smart person. I would also suggest working on your knowledge and experience of standard of the shelf and jellybean circuitry.

Makes the discussion also a lot nicer for everyone involved.
Thank you, no more discussions about discussions please, be constructive and respectful.

[b_force]

So leaving that little notice aside, I think I am going to build in the delay somewhere else.

The downside of the delay with a capacitor between the base and collector is with the initial start-up phase.
I have to see how that's gonna work in practice, it might be just enough, but I might as well soft-start the DC-DC boost converter (as mention in the first post). Because that will just give me a little more control over the charge current in general.

[b_force]

Just when I was about to call it quits and enjoying family and the weekend (far more important), I just realized the obvious.

Something that apparently Eeyore also couldn't figure out.

But for those who are reading along, just a brief explanation again.
What we are looking for is just a simple RC circuit, which can be created with a capacitor parallel to R4, as I mentioned before.
Just a bigger value, something like 4,7-10uF or so, which obviously kind of depends on the max load capacitance.
But precision will never be part of this circuit.
This will give a rough response time of around 0.5-1ms or so.

A capacitor or RC on PROT out will also work (I think somebody already mentioned that).

I just also got the soft-start on the PCB, but I bet I can squeeze another cap in somewhere.
Killing two birds with one stone 
 

[moffy]

Nice.
I did a quick little sim and you might want to add a diode between the base and emitter as shown to protect the PNP from excessive reverse biasing of the BE junction during turn off. I have no idea of your input/output configuration, so I am not sure it is necessary, but it is just a thought to consider. Please excuse also the insertion of values, it's just so I could simulate it.

[b_force]

Nice.
I did a quick little sim and you might want to add a diode between the base and emitter as shown to protect the PNP from excessive reverse biasing of the BE junction during turn off. I have no idea of your input/output configuration, so I am not sure it is necessary, but it is just a thought to consider. Please excuse also the insertion of values, it's just so I could simulate it.

Thanks, right yeah.

I don't think it will be too bad, I have checked the max current and power before.
Also some current will flow already from R4 and R1.
I will see, I might have some more space for a tiny little diode (or dual in one package )

btw, R3 is also really big in your example, R3 in my case is around 560 ohm or so, and R4 around 22k-47k

Also, with a PWL voltage source and a switch it's possible to simulate sudden disconnect/discharge behavior 

[moffy]

Yeah wasn't sure it was necessary to put the diode as you have to exceed 5v in the reverse direction to break down the BE junction, and then it is only bad if it passes excessive current.