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Switching mosfet in leaded package faster than 1000 A/µs ?

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Miyuki:
Hi folks,

I have a question
Is any reliable way of switching mosfet with Vgs rating of +-20V in leaded package (TO-220, 247...) faster than 1000 A/µs

If possible I want to get somewhere about 3-5 000 A/µs and packages with kelvin lead is not available

SiliconWizard:
1000A/µs? :o

rhodges:
Are you building an atomic bomb?

Miyuki:
No just experimental high current fast synchronous buck
Fsw 250 - 300 kHz
Iout 80-100 A

Today mosfets have so small gate charge and so low Rdson they can easily withstand this kind of current in single chip/device and at moderate gate drive current 3-4A have switch time in tens of ns

But then is here problem of 80A on 80ns  > 1000A/µs
And gate drive itself can go much faster

Yes I know it can be simply avoided by just using bunch of small ones in parallel
But solution with single TO-220 will be nice (it shouldn't have even big power dissipation just lower tens of watts, so thermally easy manageable)

duak:
With a dI/dt of 1 A/ns you ought to consider the loop areas of the switched circuits and their interactions.

According to this loop area inductance calculator https://www.eeweb.com/tools/rectangle-loop-inductance a loop 10 mm * 2.5 mm with 1 mm dia wire (estimate of TO-220 package leads and wirebonds) has an inductance of 6.68 nH.  The counter-EMF generated by this inductance is = L * dI/dt = 6.68 V.  This voltage is in series with whatever is being switched in the source-drain circuit.  The gate-source drive circuit will also have some or all of this voltage in series with it because of mutual inductance.  Connecting to the drain tab should reduce the loop area somewhat but won't be as effective as a kelvin connected gate drive circuit.

If you can model the circuit well enough you might be able to pre-distort the gate drive waveform to compensate for the intrinsic series inductances and deliver a better waveform to the gate. One way is to discharge a capacitor charged with a higher voltage to get things going and count on the various reactances to limit the gate to source voltage to a safe value.

If the circuit voltages are high enough, the counter-EMFs will not play as large a role in increasing current rise & fall times.  What voltages are you planning to work with?

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