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Sziklai pair

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David Hess:

--- Quote from: xavier60 on December 31, 2019, 11:51:08 pm ---
--- Quote from: nfmax on December 31, 2019, 10:48:30 pm ---The feedback loop occurs within the Sziklai pair itself. Assume, for simplicity, that the input voltage is constant. A change in the collector current of Q3, acting across R2, causes the emitter voltage of Q6 to change. Since the input voltage is constant, this device operates in common base mode, so the change in Q6 emitter voltage causes a change in its collector current. But Q6's collector current is Q3's base current, so the change in Q6's collector current is amplified by Q3 and appears at its collector, completing the feedback loop.

At DC the sense of this feedback is negative. Q3's fT provides the dominant pole at the frequency where its beta starts to fall from its DC value. If the loop gain has not dropped to less than 0dB before the additional phase shift from Q6 reaches 90˚, the loop will oscillate. Too fast a device in the Q3 position, relative to Q6, is likely to give trouble.
--- End quote ---

That explains the reason for this circuit oscillating if the 27pF compensation capacitor isn't fitted.
It's an amplifier circuit I use for video signal.
--- End quote ---

Exactly although the compensation can also be done with a shunt capacitor to ground as shown below for the positive side output on a Tektronix PS503A dual supply.  I am inclined to think that any solution which does not use a series RC pair is guesswork.

The difficulty with this type of problem is knowing if there is sufficient phase and gain margin available when the two transistors have their worst case characteristics with the worst case load and operating point.  Notice that in this example, the series 0.6 ohm current shunt and 47 microfarad output capacitor help buffer the output load of the power supply in a measured way and are essential for stability.

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