At what frequency (digital) do you need to worry about RF?

[zappedy]

Is < 10 Mhz still on the safe side, for digital, where you don't need to worry too much about the RF aspects of wiring and soldering, unless you do something obviously stupid?

Or will be it necessary to go the FPGA route:

In order to debug an 8MHz computer that I've mentioned in earlier thread, I'm building a small device/PCB that will let me do some real-time poking of some pins, as well as let me emulate the program ROM with a flash device (that can be easily reprogrammed). For various reasons the best solution would be to be able to switch the connections of some chips, and one way of doing that is to have "banks" of soldered jumpers. There will be two rows of .1" spaced pins next to each other, and then I'll connect every pair of pins with two glued-together and solder-bridged rows of female .1" spaced headers. And ideally, wire some stuff here and there, and have several rows of pin headers connected to the same IC pins, so some functionality can be switched, etc.

Another way of doing (most of) this would be to use an FPGA, but that would include acquiring a new skill set. Too much hassle.

No access to proper testing equipment, unfortunately!

[T3sl4co1l]

0 Hz (DC).

It's not the clock rate that kills, it's the edge rate.

Even a single rising edge can have signal quality issues!

For an 8MHz PC (TTL level signals), the edge rates were ~10ns at best, and so you don't have to worry much about signal quality until the total-lead-length-per-line is comparable to about a meter.

Tim

[zappedy]

Thanks! So, basically no worries for old computers then! I still see a lot of them having terminations, ferrite donuts and whatnot, but I guess the IC processes and input stages were primitive compared to today, and it was a better safe than sorry type of thing?

[KJDS]

I've had some big issues at 1MHz, but there was a few hundred kW going into the antenna

[T3sl4co1l]

The metal shield over the motherboard, or the metal chassis, solves a lot of ills -- and they need to solve ills much more subtle than signal quality.

If you have 20% of your signal leaking out of a wire, and your source is 5V logic level, then you're leaking 1V, and receiving a 4V step.  You still get valid CMOS logic thresholds (which is >= 3.5V logic-high).  Digital signal quality is not usually a very difficult thing.  As long as you avoid gross mismatch, you have some wiggle room where you don't have to worry about it.

Radio frequency emissions are a much more tricky thing. Levels need to be in the millivolt range, in terms of voltage measured by an antenna, or conducted along the power or data cables of the equipment.  Starting from 5V signal levels, you need on the order of 80dB isolation to free space.  A naked motherboard, no shielding, no ground plane -- it will blot out nearby radios!

That the processes were primitive, is really working in your favor -- if it were built with 74HC CMOS logic instead, the edges would be about twice as fast, meaning the critical wiring length is half, and the potential for radiating interference is also doubled!

When you get into 74AC, 74LVC, logic families like that... waveforms get pretty sharp, and just routing within a small PCB needs to be done carefully!

There were still places where termination was necessary, even in the early 80s.  The ST-506 hard disk interface contains TTL level control signals (point-to-point routed, and terminated at the end), and RS-422 (differential, point-to-point, load terminated) data signals (basically, the raw data from the disk heads, coming from a detector amplifier).

One or two drives could be connected to a single drive controller.  The control signals used a ribbon cable with a middle and two end connectors; if you used one drive, you connected it to the end of the cable, leaving the middle connector unused.  If you used two, you connected middle and end to each drive.  There was also a socket on the drive, near the connector, for a resistor network, which terminated the cable.  This was installed in whichever drive was at the end of the cable.  The data cables were point-to-point, so the controller card had two connectors, one for each ribbon cable.  But they were able to economize on the control cable, using one for a pair of drives.

Tim

[dmills]

A lot of those early machines were nmos which had really poor noise immunity (IIRC it also did not pull high very well, to the point that driving TTL needed pullup resistors), and things like the early dram parts were notorious for needing source termination on the address busses if you wanted them to work halfways right.

These days, edge rates on even jellybean silicon make source termination a good idea even for notionally slow signals, just to keep the rf down. 

Regards, Dan.

[T3sl4co1l]

If this is PC-as-in-IBM-PC-compatible, it should all be 74LS TTL, or reasonably equivalent N/H/C/MOS.

Early computers, like from the S-100 days, may well simply run the CPU pins (typically that weak NMOS, e.g. original Z80-CPU) around the whole machine, and logic-high can suffer quite a bit as a result.  But that's mostly a capacitance issue, because the output impedances are fairly high compared to most wiring.

Tim