Interfacing between different voltage levels (0<>2.5 and 3.3<>5.8 !!!)

[ali80]

I have an ADC with the following supply specifications:
AVDD to AGND:   5v
DVDD to DGND:   3.3v
AGND to DGND:   0v
I want to interface between this IC and a 3.3v logic microcontroller (SPI Protocol with 10Mbps data rate), but the problem is
that the AGND (and so the DGND) of the ADC is sitting at -2.5v but the uC GND is sitting at 0v.
If I want to say my problem in other words:
Assume I set the AGND of my adc as my new 0v reference, I want to convert 0v logic to 2.5v and 3.3v logic to 5.8v (=3.3+2.5) and vice versa.
Here is my line of thinkig so far(plz corrent me if I'm wrong):
 1. I know that I can use discrete logic but at this data rate I dont know any easy and/or neat solution.
 2. I know there are interfacing ICs to convert between 1.8v, 3.3v or 5v. but I dont think thats applicabale to this problem since the GND of  the ICs are sitting at different voltage levels.
 3. I'm also thinking on using some form of isolation (optical or magnetic) and I guess that would be possible
 By the way I really cant connect AGND of the ADC to 0v, so that's not an option, and changing the adc is not an option too 
 I'm asking if anyone knows an easier way such as ones used in bipolar ADCs to convert between these kind of voltage levels.

[HalfSpace]

Hi ali80,

I would use some opto couplers to solve your problem. Digi-key has them up to 50Mbps.

HalfSpace 

[T3sl4co1l]

Opto?  For only 2.5V of difference?  Oh man you give up easily!

Assuming you can't arrange your analog side to work on an elevated ground (almost always the easier solution), you can use transistors in various common emitter or common base type circuits to perform level shifting.

Tim

[moffy]

You could try the following, but remember they are inverting.

P.S. If you can't get a MOSFET with low enough Cdg the resistor values should be reduced by a factor of 5 to 10.

[Siwastaja]

If there is an ADC, there may be a requirement for reasonably low noise, no ground loops, etc, I'd guess.

Also, if there really is a reason to have two different grounds, this sounds like a potentially noisy environment, or at least a candidate for ground loops.

So I would definitely at least consider isolation. Everything doesn't need to be a circuit design challenge; isolation is not only the "easy way out", but it offers superior performance in some cases, and this smells a bit like such a case. Doesn't need to be an opto; "digital isolator" chips (utilizing transformers and logic that make it appear as a transparent logic buffer) may be cheaper and/or faster. (Or may not, check the specs and prices.) But one thing is sure, isolation does cost a bit more, maybe a few extra bucks.

In any case, I would strongly recommend reading this paper as this is a mixed signal design with separate grounds: http://www.hottconsultants.com/pdf_files/june2001pcd_mixedsignal.pdf

[ali80]

Hi ali80,

I would use some opto couplers to solve your problem. Digi-key has them up to 50Mbps.

HalfSpace 

optos are too power hungry and expensive at high speeds

You could try the following, but remember they are inverting.

at high speeds because of the capacitive loading of the input logics, you should have low impedance driving source, but your circuit should work at low speeds and interesting circuit indeed

If there is an ADC, there may be a requirement for reasonably low noise, no ground loops, etc, I'd guess.

Also, if there really is a reason to have two different grounds, this sounds like a potentially noisy environment, or at least a candidate for ground loops.

So I would definitely at least consider isolation. Everything doesn't need to be a circuit design challenge; isolation is not only the "easy way out", but it offers superior performance in some cases, and this smells a bit like such a case. Doesn't need to be an opto; "digital isolator" chips (utilizing transformers and logic that make it appear as a transparent logic buffer) may be cheaper and/or faster. (Or may not, check the specs and prices.) But one thing is sure, isolation does cost a bit more, maybe a few extra bucks.

In any case, I would strongly recommend reading this paper as this is a mixed signal design with separate grounds: http://www.hottconsultants.com/pdf_files/june2001pcd_mixedsignal.pdf

yeah, I have read Henry Ott's book, great book, I agree with you, I'm thinking on using Magnetic Isolation, Analog Devices have great chips using this technology with good power consumption and amazing speeds.

[AndreasF]

I assume the reason your ADC sits at -2.5V AGND with respect to your uC GND is that you want a symmetric analog output of -2.5 to +2.5 V (?). If that's the case, would it not be much easier to DC shift the analog output of the ADC down (from 0-5V to -/+2.5V) after the conversion?

[ali80]

I assume the reason your ADC sits at -2.5V AGND with respect to your uC GND is that you want a symmetric analog output of -2.5 to +2.5 V (?). If that's the case, would it not be much easier to DC shift the analog output of the ADC down (from 0-5V to -/+2.5V) after the conversion?

well it is and ADC and not a DAC, yeah it's much easier to add some offset to the inputs and thats what I did, but as I said that's not an option anymore

[HalfSpace]

Hi all,

I suggested using opto couplers because I have been down this road before. I was asked to resolve a design problem using bipolar level translators that generated ground noise issues reducing the resolution of the 20bit ADC that was used. Modification to the translators helped a little but only opto isolated translators worked well. Magnetics could not be used as the reset and chip select pins needed to be in both logic states for long periods of time.


Hi ali80, Is this mod to a device that is going into production or is it a one off?

HalfSpace 

[moffy]

This is an alternative to the first one using BJT's. Non inverting but relatively low input impedance (910/10pF).

[Siwastaja]

Magnetics could not be used as the reset and chip select pins needed to be in both logic states for long periods of time.

Today we have things like http://www.analog.com/en/interface-isolation/digital-isolators/products/index.html . These add the necessary signal transitions and everything's integrated and works transparently. These were developed because optos were slow, power-hungry, expensive and they may have limited use hours. That being said, at the same time optos have come a long way, so some modern optos are great, too.

[T3sl4co1l]

This is an alternative to the first one using BJT's. Non inverting but relatively low input impedance (910/10pF).

You actually want the bases swapped, because collector is referenced to emitter, not base voltage.  So you'll get more like +0.6V instead of ~0V for the one output, and -0.6V for the other.

Emitter input is probably just about ideal for this level shift, though.  Easy and switches fast.

Tim

[moffy]

This is an alternative to the first one using BJT's. Non inverting but relatively low input impedance (910/10pF).

You actually want the bases swapped, because collector is referenced to emitter, not base voltage.  So you'll get more like +0.6V instead of ~0V for the one output, and -0.6V for the other.

Emitter input is probably just about ideal for this level shift, though.  Easy and switches fast.

Tim

Bases are fine as they are. Run a sim as I did, you'll see. The collector can effectively go 0.45v below the base voltage, which is about 0.2v above the emitter (talking npn here) if the transistor saturates. But because of the resistance values the minimum voltage Vce is about 0.7v keeping the transistor out of saturation while reaching 0v at the collector.
Perhaps you misread where I put the ground? Added sim file.

[T3sl4co1l]

Oh, it's not saturating.  Gotcha.

Even faster!  Though somewhat more sensitive to voltage and component tolerances.  If the supplies ever vary (they're probably regulated..), as long as they vary proportionally, it'll always work out.

Tim

[ali80]

This is an alternative to the first one using BJT's. Non inverting but relatively low input impedance (910/10pF).

You actually want the bases swapped, because collector is referenced to emitter, not base voltage.  So you'll get more like +0.6V instead of ~0V for the one output, and -0.6V for the other.

Emitter input is probably just about ideal for this level shift, though.  Easy and switches fast.

Tim

Bases are fine as they are. Run a sim as I did, you'll see. The collector can effectively go 0.45v below the base voltage, which is about 0.2v above the emitter (talking npn here) if the transistor saturates. But because of the resistance values the minimum voltage Vce is about 0.7v keeping the transistor out of saturation while reaching 0v at the collector.
Perhaps you misread where I put the ground? Added sim file.

I think you gotta factor the capacitive loading on the converted voltages (10-20 pf), your circuit cant work well in MHz range but very interesting circuit for converting voltage levels, I'll save it for later use:) thank you and thank everybody else, I strongly favor the magnetic isolation solution and I think I'll go with that.

[moffy]

This is an alternative to the first one using BJT's. Non inverting but relatively low input impedance (910/10pF).

You actually want the bases swapped, because collector is referenced to emitter, not base voltage.  So you'll get more like +0.6V instead of ~0V for the one output, and -0.6V for the other.

Emitter input is probably just about ideal for this level shift, though.  Easy and switches fast.

Tim

Bases are fine as they are. Run a sim as I did, you'll see. The collector can effectively go 0.45v below the base voltage, which is about 0.2v above the emitter (talking npn here) if the transistor saturates. But because of the resistance values the minimum voltage Vce is about 0.7v keeping the transistor out of saturation while reaching 0v at the collector.
Perhaps you misread where I put the ground? Added sim file.

I think you gotta factor the capacitive loading on the converted voltages (10-20 pf), your circuit cant work well in MHz range but very interesting circuit for converting voltage levels, I'll save it for later use:) thank you and thank everybody else, I strongly favor the magnetic isolation solution and I think I'll go with that.

If you put the level translator near the input it is translating to, then trace capacitance will only be 1-2pf at most. You can also buffer the output to drive longer traces. It'll work to 20MHz. If you want to improve the speed then just lower the resistor values. Lots of alternatives.

[Andreas]

I would most probably use a CD4053/74HC4053 analog multiplexer.

With best regards

Andreas

[ali80]

This is an alternative to the first one using BJT's. Non inverting but relatively low input impedance (910/10pF).

You actually want the bases swapped, because collector is referenced to emitter, not base voltage.  So you'll get more like +0.6V instead of ~0V for the one output, and -0.6V for the other.

Emitter input is probably just about ideal for this level shift, though.  Easy and switches fast.

Tim

Bases are fine as they are. Run a sim as I did, you'll see. The collector can effectively go 0.45v below the base voltage, which is about 0.2v above the emitter (talking npn here) if the transistor saturates. But because of the resistance values the minimum voltage Vce is about 0.7v keeping the transistor out of saturation while reaching 0v at the collector.
Perhaps you misread where I put the ground? Added sim file.

I think you gotta factor the capacitive loading on the converted voltages (10-20 pf), your circuit cant work well in MHz range but very interesting circuit for converting voltage levels, I'll save it for later use:) thank you and thank everybody else, I strongly favor the magnetic isolation solution and I think I'll go with that.

If you put the level translator near the input it is translating to, then trace capacitance will only be 1-2pf at most. You can also buffer the output to drive longer traces. It'll work to 20MHz. If you want to improve the speed then just lower the resistor values. Lots of alternatives.

I'm not talking about the trace capacitance alone, you should also consider capacitance of the input logic pins

[moffy]

I have. Input capacitance of 74HC14 is 3pf. If you drop the load resistor (collector) to 1k and the emitter resistor to 560 also a BC847 transistor, it will easily drive 5pf at 20MHz. If you buffer the input and output with a 74HC14, they are rated for 3.3v, place the level translator near the output/collector buffer you will have no problems. It will also have HC logic compatible input and output, but it is your choice.

[zapta]

Don't know if it was already mentioned here but these discrete level shifters are bidirectional and non inverting.

http://dlnmh9ip6v2uc.cloudfront.net/datasheets/BreakoutBoards/Logic_Level_Bidirectional.pdf