role of optocoupler for biasing drain of amplifiers

[john23]

Hello XVR, I saw in the datasheet tacle attached  that  its 4A is continues 25A when pulsed  .
What are the pulse limitation  for this N MOSFET because 25A is very high?

https://www.mouser.com/datasheet/2/308/1/NDT3055L_D-2317585.pdf
Thanks.

[xvr]

Do you turn on power for amplifiers only for milliseconds? Or you will turn them on more o less permanently?

See Figure 9 in datasheet .

You should look on permanent Id, not pulsed

[john23]

Hello XVR, You said i should put a zenner diode .
did you meen in parralel to the power supply? becuase i had negative power supplyand it solved the problem :-)

Regarding what you said for pulse and heat.In the datashet there is a plot  figure 11 attached.
suppuse i have 1sec period and 50% duty cycle.
t1=0.5sec so r(t) is 0.5
R_JA=110 C/W *0.5 =55C/W
What is Tj-TA in the plot? how do i know what temperature rise the mosfet can handle?

https://www.mouser.com/datasheet/2/308/1/NDT3055L_D-2317585.pdf

[xvr]

> You said i should put a zenner diode .
did you meen in parralel to the power supply?

No. In series with R2 in my schematic

As for temperature raise, it calaculated as power, dissipated in MOSFET multiplayed by Temperature resistance (55W/C by your calculations). Power dissipation is I^2*Rdson

Graph in question shows changes of Temperature resistance via pulse characteristics.

Tja & Tjc are temperature resistancies from chip junction to ambient (this is case of bare chip in air) and for chip junction to case (this is variant of chip attached to ideal heatsink)
As you understand there is no such thing as ideal heatsink, so in later case you shoul add Temperature resistance of heatsink itself to Tjc to get real value

[john23]

Hello XVR,could you give a practical numerical example with Tja & Tjc expression so i could see in what cases my MOSFET will be burned?
Thanks.

[xvr]

Ok, lets start from NDT3055L

Calculate for worst case 2 amp in parallel with steady on state. We have 12A load.
Rdson = 0.1OHm, so Voltage Drop on transistor is 12*0.1 = 1.2V, This is 6% of 20V, this is more than 5% of amplifier tolerance (as far as I remember) - transistor can't be used in this configuration

Let's try to calculate for 6A load.
Voltage drop is 6*0.1=0.6V. This is 3%, so your power supply should provide 20V +5%/-2% (quite tight but possible).
Power dissipation on transistor: P = I*V = 6*0.6 = 3.6W. This is quite a lot for smd chip without heatsink.
Temperature raise: P*Tja = 3.6*42 = 151C. Die temperature is 151 + 25 (ambient) = 176C. This is more than 150C maximum. So, transistor can't be used.

Now, let's try to evaluate for pulsed mode (2s cycle 50% duty cycle). By Figure 11 give coefficient 0.5 to Tj.
So, Tja will be 21, Die temperature is 3.6*21+25 = 100.6. In limits, but still too hot. Each 10 degrees of temperature raise reduce life time of transistor by 2 times.
And relaying for pulsed mode also dangerous - if some amplifier will be turned on for more than some time (10-100s approximately) transistor will be burned out.

Now check SiSS65DN.
Rdson = 4.6mOhm. Voltage drop (12A load) is 12*4.6e-3 = 55mV. Almost negligible from point of view of power supply for Amplifier.
P = 12*55e-3 = 0.66W. Max T raise 0.66*25 = 16.5C. Quite cold.

PS. 25 is worst case for Tja (from datasheet). But it specified for mounting on PCB with 1" copper area and for pulse less than 10s. DS do not contain information for steady state. But there is a large reserve in power and temperature, so steady state should not be a problem.

[john23]

Hello XVR,siss65dn sounds great,however I need to use CGHV1A250F power  amplifier.
regarding being able to handle rise and fall times.
As you can see in te attached photo they put very very large capacitors.
suppose for the drain i will only put  1uF + 470pF.
I=CdV/dt
C=470pf
dV=45V
dt=100nsec
so 1470pF*45V/10ns=6.6A which is possible with this great mosfet.

The problem with this new  CGHV1A250F amplifier the it needs 45V on the Vds to function.
However siss65dn  PMOS has tottaly different  .


Even if we needed 12A for example from this mosfet :-) how can connect this mosfet with the new amplifier so each one of them will get the bias it needs for proper functionality?


Thanks.


https://www.alldatasheet.com/datasheet-pdf/pdf/1673867/WOLFSPEED/CGHV1A250F.html
https://www.mouser.co.il/ProductDetail/Vishay-Semiconductors/SISS65DN-T1-GE3?qs=gTYE2QTfZfRTVNwOG%2FwJeQ%3D%3D&_gl=1*1ew6q0n*_ga*MTc3OTc5NzEwMS4xNzE0MzE3MTU5*_ga_15W4STQT4T*MTcxNDgxNzUzNi41LjAuMTcxNDgxNzU0MS41NS4wLjA.

[xvr]

CGHV is not amplifier, it's just a transistor. You don't need to gate power to it - just removing of input signal is enough to turn it off.
If you still need to switch power you will need mosfet with more Vds voltage.
As for 339uF capacitor it can be placed BEFORE switching MOSFET

[john23]

In page 13 diagram I need to put Vgg and Vdd,In page 14 they say even a procedure.
How do i connect this PMOS to the CGHV1 transistor so they can work together in the previos configuration of mosfet current goint into the drain of the CGHV1A250F?
What i the logic so they will bias together properly?
Thanks.

https://pdf1.alldatasheet.com/datasheet-pdf/download/1673867/WOLFSPEED/CGHV1A250F.html

[xvr]

> How do i connect this PMOS to the CGHV1 transistor so they can work together in the previos configuration of mosfet current goint into the drain of the CGHV1A250F?

You should place MOSFET between C18 '+' pin (Source) and top point of W1 (Drain).

> What i the logic so they will bias together properly?

Bias you should commutate independently by another circuit.

In terms of schedule on page 14 MOSFET on/off is a '3. Apply nominal drain voltage (Vd)' and '3. Turn off drain voltage (Vd)'

[john23]

Hello XVR , i have made the simulation of the PMOS model but for PMOS i need negative Vds so i get negative voltage on the CGHV1A250F.
My driver gate voltage node was switched in order to open the  SiSS65DN.
How do i get positive voltage on CGHV1A250F when my PMOS drain of SiSS65DN needs to be negative?

Thanks.

[xvr]

Your schema is wrong again. Take a look at my original schema in post 41

[john23]

Hello XVR, i am trying to solve the equations for PMOS current threw the drain.
I drew the currents on the attached photo.
Von suppose its 5V for mathematical purposes :-)
how do i know the voltage potential at the collector of the bjt? so i could find the voltage at the gate of the PMOS afterwards
Thanks.
Von-Ib*R3-Vbe=0
Ib=(Von-Vbe)/R3
Ic=beta*Ib=beta*(Von-Vbe)/R3
20-(R1+R2)*Ic=V_bjt_collector

[xvr]

Voltage on MOSFET Gate swing from zero (when BJT is open) and to Vdd (when it closed). Voltage drop on R2 considered negligible and can be assumed as zero. Purpose of R2 is reduce current surge when BJT opened, because MOSFET Gate is a capacitor and without R2 its churge current is not limited. R1 used to bring Gate voltage to zero when BJT is closed and to provide path to discharge Gate capacitor.
If MOSFET maximum Gate voltage is lover than Vdd additional TVS should be placed in series with R2 to reduce Gate voltage to allowed limit. R1 in this case used to provide minimal stabilization current to TVS

BJT used in on-off mode, turned off completely when control voltage iz zero and be in saturation when control voltage is at logical high. Base resistor selected to be low enough to ensure saturation with minimum h21e and maximum allowed BJT collector current. R2 also should limit this current to maximum of BJT. Current assumed as Vdd/R2

[john23]

Hello xvr,I have found  NPN which is Ic=100mA Vce=30V shown below.
regarding  the compatibility between the SISS65DN and CGHV1A250F

I need to put 45V of the drain of the CGHV1A250F while the Vds of the PMOS can only have -30 Vds .
what Voltage source to put on the mosfet so i'll have +45 at the drain of CGHV1A250F?
Thanks.

NPN datasheet:
https://www.nexperia.com/products/automotive-qualified-products-aec-q100-q101/automotive-bipolar-transistors/general-purpose-bipolar-transistors/transistors-single-npn/BC848B.html

PMOS:
https://pdf1.alldatasheet.com/datasheet-pdf/download/1377290/VISHAY/SISS65DN.html

[xvr]

You need another NPN and MOSFET - rated for 50V or more

[john23]

Hello XVR, I have fount the si7461dp PMos shown below .
From datasheet  of CGHV1A250F figure 7 I need 14A and 45V for each transisor.
can they work together?
What source voltage to use in the diagram you reccomended?
why did you says that my NPN also needs to be 50V rating on VCE?
Thanks.
 
https://www.vishay.com/docs/72567/si7461dp.pdf
https://pdf1.alldatasheet.com/datasheet-pdf/download/1673867/WOLFSPEED/CGHV1A250F.html

[xvr]

Steady state drain current of SIxxx is not enough (8.6A in best case). You need 14A. And Rdson is quite large. 11mOhm (vs 4 of previous version) But you can use a 2-3 pcs in parallel.

NPN BJT should be able to handle full Vdd, because at start of turn-on process Gate-Source of MOSFET can be considered as fully discharged capacitor. This capacitor plugged in series with CE junction of BJT to Vdd. So CE junction will see full Vdd voltage (voltage drop on R2 can be disregarded)