Electronics > Projects, Designs, and Technical Stuff
This is becoming quite a challenge, but I managed it.
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technix:

--- Quote from: james_s on November 19, 2018, 05:11:53 pm ---I don't really care too much about TQFP. It's nice for prototyping but BGA is no longer the non-starter it used to be for personal projects, especially when you can buy $20 dev boards from China. With an FPGA it's nice to have gobs of IO.

--- End quote ---
BGA = no bueno on a 2-layer board with little exceptions. This whole point of this challenge is to route that TQFP-100 FPGA fully out to various peripherals while being constrained to the Arduino Uno form factor and use only two layers.


--- Quote from: SiliconWizard on November 19, 2018, 05:53:20 pm ---
--- Quote from: james_s on November 19, 2018, 05:11:53 pm ---With an FPGA it's nice to have gobs of IO.

--- End quote ---

Gobs of IO is nice but that can be a nightmare to fan out and route to headers, and there's an ultra small probability he would have managed to route that on a 2-layer board as seems to be his challenge here. ;D

--- End quote ---
I have already routed every pin on that FPGA out - Arduino headers, parallel SRAM, QSPI, two different interfaces to the MCU, etc. On this two-layer board there is already little space left, and I had to snake the power traces quite a bit.
technix:

--- Quote from: SiliconWizard on November 19, 2018, 05:50:37 pm ---
--- Quote from: technix on November 19, 2018, 05:09:43 am ---
--- Quote from: SiliconWizard on November 18, 2018, 11:13:01 pm ---I've grown to hate Actel parts and Libero even more.
But YMMV. ;D

--- End quote ---
Is there any reason for that?

--- End quote ---

From my experience with the Proasic3 line, they consistently tended to draw more power than expected and it was often a fight to meet timing constraints compared to other vendors' FPGAs in similar ranges. Usually switching to Xilinx or Lattice was an instant relief.

As for Libero, recent versions may have improved, but back when I was using it (few years ago), it was one of the most atrocious pieces of software I'd ever used ;D
Ultra slow, cumbersome, confusing... programming with Actel "pods" was also nightmarishly slow as I recall.

This is just my experience though - don't let that deter you from trying and get your own opinion.

--- End quote ---
This is literally my first ProASIC board... The first Duplex POC (STM32L432 + XC2C32A) failed, and I just bought a FlashPro 5 and has some ProASIC3 samples so this is my second Duplex POC.
SiliconWizard:

--- Quote from: technix on November 19, 2018, 08:06:09 pm ---
--- Quote from: SiliconWizard on November 19, 2018, 05:50:37 pm ---
--- Quote from: technix on November 19, 2018, 05:09:43 am ---
--- Quote from: SiliconWizard on November 18, 2018, 11:13:01 pm ---I've grown to hate Actel parts and Libero even more.
But YMMV. ;D

--- End quote ---
Is there any reason for that?

--- End quote ---

From my experience with the Proasic3 line, they consistently tended to draw more power than expected and it was often a fight to meet timing constraints compared to other vendors' FPGAs in similar ranges. Usually switching to Xilinx or Lattice was an instant relief.

As for Libero, recent versions may have improved, but back when I was using it (few years ago), it was one of the most atrocious pieces of software I'd ever used ;D
Ultra slow, cumbersome, confusing... programming with Actel "pods" was also nightmarishly slow as I recall.

This is just my experience though - don't let that deter you from trying and get your own opinion.

--- End quote ---
This is literally my first ProASIC board... The first Duplex POC (STM32L432 + XC2C32A) failed, and I just bought a FlashPro 5 and has some ProASIC3 samples so this is my second Duplex POC.

--- End quote ---

Do not hesitate to report back once you get your board working.
technix:

--- Quote from: SiliconWizard on November 19, 2018, 08:10:05 pm ---
--- Quote from: technix on November 19, 2018, 08:06:09 pm ---
--- Quote from: SiliconWizard on November 19, 2018, 05:50:37 pm ---
--- Quote from: technix on November 19, 2018, 05:09:43 am ---
--- Quote from: SiliconWizard on November 18, 2018, 11:13:01 pm ---I've grown to hate Actel parts and Libero even more.
But YMMV. ;D

--- End quote ---
Is there any reason for that?

--- End quote ---

From my experience with the Proasic3 line, they consistently tended to draw more power than expected and it was often a fight to meet timing constraints compared to other vendors' FPGAs in similar ranges. Usually switching to Xilinx or Lattice was an instant relief.

As for Libero, recent versions may have improved, but back when I was using it (few years ago), it was one of the most atrocious pieces of software I'd ever used ;D
Ultra slow, cumbersome, confusing... programming with Actel "pods" was also nightmarishly slow as I recall.

This is just my experience though - don't let that deter you from trying and get your own opinion.

--- End quote ---
This is literally my first ProASIC board... The first Duplex POC (STM32L432 + XC2C32A) failed, and I just bought a FlashPro 5 and has some ProASIC3 samples so this is my second Duplex POC.

--- End quote ---

Do not hesitate to report back once you get your board working.

--- End quote ---
I am still not 100% clear what can this thing do after the initial POC though.

Having external SRAM and QSPI Flash does allow me to implement soft core processors in it, but will it be worthwhile to do that? If not, what kind of experiment can I do with that MCU and FPGA combo?
chickenHeadKnob:

--- Quote from: technix on November 19, 2018, 08:38:11 pm ---Having external SRAM and QSPI Flash does allow me to implement soft core processors in it, but will it be worthwhile to do that? If not, what kind of experiment can I do with that MCU and FPGA combo?

--- End quote ---

I don't think that part is big enough for any kind of soft core other than a minimalist barely turing complete stack machine (zero operand). Yesterday I looked up that part on find chips and saw a price of about $10 and 060 in the part number and though wow, cheap. Thinking 060 referred to macrocells or luts instead of gates. Only 1500 "versa-tiles", which are finer grained units than typical fpga fabric, and no dsp tiles or MAC units. Soft cores don't make much sense these days when there are inexpensive ARM mcu's and there already is one included in your design. A better target fpga would have been ice40up5k. Has a growing hobby-open source following and greater capacity, although it is slow as mud and has fewer I/O.
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