Value of tech to parallel many MOSFETs/IGBTs to handle several thousand amps?

[zombiess]

I'm curious to hear the thoughts of this crowd with this topic.  I've been researching paralleling devices to work with higher currents as a personal project for a while now.  I'm quite familiar with the challenges and reaching the point of diminishing returns when adding more devices.  With careful matching it seems possible to run out to around 10 devices in parallel which is the most that I've seen in production (Sevcon Gen4 size 6 motor drive).

Do you think a design that would allow 30-100 lower cost devices (or even dies in a module) to be placed in parallel with equal current sharing would be considered valuable?  I believe it is valuable w.r.t. EVs as it could allow lower traction pack voltages for the same power level by running higher currents, or allow higher powered controllers with 2x the power they currently have (I'm a power junkie so I like this idea).

What would you do if you created a relatively simple solution to this issue?  Patent it and try to make money off it?  Share it with the world for free?

[MagicSmoker]

Getting a bunch of devices to share current equally under static conditions is easy - a little bit of degeneration (ie - series resistance) and good thermal coupling are usually sufficient (even for devices that have a negative forward drop tempco, like Schottky diodes). It is getting a bunch of devices to share current under dynamic conditions - ie, when transitioning from on to off or vice versa - that is hard, and the failures that result from dynamic disequilibrium tend to be random, sudden and invariably of the cascading variety. Dynamic disequilibrium is the result of differences in device behavior as well as wiring/trace inductances. Clever board layout can reduce the latter - as well as intentionally inserting extra inductance in series with each leg - but that adds cost and still doesn't address the fact that there will always be one switch that turns on first and one that turns off last.

Also keep in mind that there are limits to how much current the leads on a TO-220, -252, -263, -247, etc. device can carry, regardless of what the datasheet might proudly proclaim the silicon inside is capable of. A good rule of thumb is to assume 40-60A max for each TO-247, and 20-30A for all other power packages, which means if you want to switch 1000A with TO-220 parts - because they are cheap! - you'll find you need 50 of them... and a heavy copper PCB to solder them to - which isn't so cheap! - and suddenly those "expensive" modules don't look so bad after all.

edit - inserted missing "other".

[zombiess]

MagicSmoker -all those issues have been solved.

I tested the limits of a TO-220 device was tested at ~90W (IRFB4115) and a TO-247 package can do around ~120W (IRFP4668) during testing.  These are pretty much best case scenarios with the device mounted directly to a large fan cooled heat sink with thin layer of thermal paste, no insulator and a max case temp of 70C.  Thermal run away tends to happen around 80C of case temp. 

Getting current / gate drive signals in and out of the layout is also solved.

MOSFET datasheets = not going to happen in real world.

***edit***

I want to clarify that this thermal testing was in an ideal condition with the ambient temp being 23-25C which is pretty unrealistic for any real world design.

[T3sl4co1l]

The bigger issue is snubbing: you can't simply pile oodles of transistors in a heap, and hope to have it switch more than once!

The value in a discrete design is that the snubbers can be distributed as well.

In that case, your design looks less like a bunch of transistors in parallel, and more like a bunch of inverters in parallel.  All you have to do is ensure they are balanced statically (sufficiently similar temperature and Vce(sat)) and dynamically (very closely matched timing between all transistors, similar stray inductances to each transistor).

In extreme cases, power combiners may be necessary to ensure dynamic balance.  At a PPoE, we used 1200V 600A quad IGBT modules, paralleling over a dozen of these modules, to build the largest (~MW) machines.  As the output was modest frequency (10s kHz), we used Litz cable (about the size of your ***!) to connect between modules and the power output transformer; for each pair of cables (from in-phase inverter output terminals), they were looped through a ferrite core, one turn each, in opposing directions.  Thus, it's a differential mode choke: any pulse or voltage imbalance between that pair of outputs (up to the flux capacity of the core) gets absorbed by the core, and current remains shared.

Tim

[Seekonk]

Litz cable (about the size of your ***!)

I'm trying to understand sizing.  Was that *** or ****?

[T3sl4co1l]

Litz cable (about the size of your ***!)

I'm trying to understand sizing.  Was that *** or ****?

Hmm, good question... censors often use an ambiguous triple-asterisk for anything, which is what I was going for...  I did mean the four letter one, though.

Tim

[Kilrah]

I believe it is valuable w.r.t. EVs as it could allow lower traction pack voltages for the same power level by running higher currents

Well, given Ohm's law and the energy cost of lumping heavy chunks of metal around isn't the EV industry precisely doing everything it can to avoid high currents by favoring high voltage solutions? 

[MagicSmoker]

MagicSmoker -all those issues have been solved.

I didn't say any of those issues couldn't be solved, rather that their solution(s) would almost certainly be impractical. I am always open to be proven wrong, however!

For example, you say you ran a TO-220 device at 90W PD... That right there demands the device have an unusually low thermal resistance from junction to heatsink for a TO-220 package and the heatsink itself also needs to handle an unusually high heat flux (ie - W per unit area), especially if your plan is to cram a bunch of these devices together on the same sink. In this particular instance, it also implies a current of ~90A through a single device, which, believe me, is heroically high for those dinky little leads.

Which segues into the next issue that is usually impractical to surmount: the current carrying capacity (aka ampacity) of the PCB. I use an empirically derived equation to estimate ampacity of traces above what IPC2221 predicts and with the usual upper limit for copper plating thickness of 0.35mm (10oz in abominable US terms) and a 40C temp rise it estimates a 10mm trace width for ~100A. I'll leave it up to the individual designer to determine if it is practical to route 10mm wide traces in to and out of a TO-220 package, but it seems pretty clear cut that there is no practical way to bus all the devices together (ie - common positive, negative and output rails); you'd need something like a 1.5m wide - yes, 1.5 meters - to handle 3kA on a 0.35mm Cu board.

Now maybe you are going to employ some time-honored kludges for increasing the ampacity of the traces, like soldering copper braid into the board, or those cute little metal rails you sometimes see in ultra-dense server/telecom power supplies, but really, at some point sanity must prevail and that means power semiconductor modules and bus bars or plates.

[MagicSmoker]

The bigger issue is snubbing: you can't simply pile oodles of transistors in a heap, and hope to have it switch more than once!

Not switching any faster than necessary and good layout (specifically, minimizing stray inductance in the switching node interconnects) can reduce or even eliminate the need for snubbing (or snubbering, if you like your English extra-mangled). For example, a laminated bus structure for the supply rails and bypass capacitance right at each device is usually sufficient as long as the dI/dt at each switching isn't too extreme (say, 1-2A/ns).

...
In that case, your design looks less like a bunch of transistors in parallel, and more like a bunch of inverters in parallel.
...
In extreme cases, power combiners may be necessary to ensure dynamic balance. ...As the output was modest frequency (10s kHz), we used Litz cable (about the size of your ***!) to connect between modules and the power output transformer; for each pair of cables (from in-phase inverter output terminals), they were looped through a ferrite core, one turn each, in opposing directions. ...

I've used both techniques with great success. A simpler version of the second which is usually sufficient provided the modules are reasonably well matched and, ideally, have a modestly positive tempco for Vce[sat] (e.g. - NPT IGBT) is to simply put some low-permeability toroid cores in series with each inverter (or chopper) output. The small amount of series inductance helps to prevent radical jumps in current in each leg as a result of the total bus current attempting to shift into whichever leg turns on first or turns off last. More precise control of volt-seconds per leg can be had with a saturable reactor magnetic amplifier, but I've had good results just tossing in a few KoolMu toroids and calling it a day.

[zombiess]

Too many assumptions are being made, probably due to the extreme ambiguity of details on how this may be accomplished.

I just want input on if something like this would be considered valuable and what you would do with it.  I know it seems like a stretch of the imagination that this could work and be low cost, but that doesn't mean it's not possible.  Just assume that the issues you think of have been solved.

At a PPoE, we used 1200V 600A quad IGBT modules, paralleling over a dozen of these modules, to build the largest (~MW) machines.  As the output was modest frequency (10s kHz), we used Litz cable (about the size of your ***!) to connect between modules and the power output transformer; for each pair of cables (from in-phase inverter output terminals), they were looped through a ferrite core, one turn each, in opposing directions.  Thus, it's a differential mode choke: any pulse or voltage imbalance between that pair of outputs (up to the flux capacity of the core) gets absorbed by the core, and current remains shared.

Tim

Any pics of that type of setup which could be shared?  I'd love to see them.

Modules are what I'd really like to parallel due to their thermal and density advantages, but not at this time due to cost, biggest I'm willing to go right now is SOT-227.

Kilrah, it depends on how you look at the issue.  With an electric motor all the matters is power, not voltage or current for a given motor copper fill.  The battery packs mass will be the same for a given power.  The conductor mass for high current would be greater between the traction pack and the controller, but this distance is typically < 1m and can be made significantly less.  In a lower voltage higher current setup you would trade this small gain in overall system mass for a less complex battery management system which reduces overall system cost and complexity.  High voltage traction packs often need additional circuitry to break them down into lower voltage sub units to make them "safer" to work on.

The other advantage of being able to do high current is you can aim for increased acceleration performance by saturating the motor to 50% efficiency so that maximum torque can be extracted.

[T3sl4co1l]

Not switching any faster than necessary and good layout (specifically, minimizing stray inductance in the switching node interconnects) can reduce or even eliminate the need for snubbing (or snubbering, if you like your English extra-mangled). For example, a laminated bus structure for the supply rails and bypass capacitance right at each device is usually sufficient as long as the dI/dt at each switching isn't too extreme (say, 1-2A/ns).

This isn't possible anymore.

1. Modern demands for miniaturization and efficiency mean you won't get anywhere with a low switching frequency.

What's low?  Depends on application, and devices used, but typically in the 50kHz range.

Multi-kW converters running at 400kHz aren't uncommon!

You simply can't make something arbitrarily small, at any arbitrary frequency, because inductor size goes roughly as sqrt(F).  That's your primary limitation.  Bypass capacitors are a problem too, but they have better performance than inductors, and therefore don't limit the design (or at least, as strongly).

2. Switching speeds are too fast, and switching devices are too large / inefficient / low current density.

The larger a device is, the more heat it can dissipate (goes as the surface area -- linear length squared).  The larger a device is, the more stray inductance it has (goes as the linear length).

The size of a semiconductor is limited by its current density (well, that and packaging).  MOSFETs are fast, but not very high current density; IGBTs are high current density, but ironically, not as fast.  GaN has high current density and ridiculous speed!

A higher amperage device can dissipate more power, but is wider and therefore more limited on switching speed.

In practice, wider terminals, better layouts, and the economy of scale (power dissipation goes up faster than inductance) make mini-modules practical.  SOT-227 is pretty good, with the Kelvin gate terminals, and available power dissipation ratings over 1000W (which means 200-500W in practice, depending on your cooling scheme).

Brick modules are a mixed bag.  Microsemi's modules have essentially maximum stray inductance; even their MOSFETs top out at 200kHz, which is laughable.  Infineon, Powerex and others have newer modules that are internally routed for low inductance, and can operate cleanly at rated switching speed.

3. Switching speeds need to be this fast, anyway.

Otherwise you can't meet the efficiency goals.

If F = 400kHz (T = 2.5us), you need Tsw << 250ns; more like 25ns for high efficiency (>95% or so?).  A TO-220 device with flush mounted lead lengths has about 7nH D-S inductance.  If 25ns is the 1/2-cycle period of the switching loop (L stray and C junction+snub), the equivalent impedance is 0.88 ohms.  That means, for a converter with a switching impedance below 0.88 ohms, you can't switch this fast, period.  That would be 27A peak at 24V supply (650 VA, so a 24V to 12V buck would do about 325W of DC), or somewhere around 50-100A (and similar volts, and a few kW real power output) at the package limit (dissipation and current).

Higher voltages are easier to deal with, because the impedance is higher; but you have to deal with the same dynamic on junction capacitance.  Drain charge is lower than ever these days, with SuperJunction FETs, SiC and GaN.  But the killer is the capacitance at low drain voltages, which behaves somewhat like diode reverse recovery: when it's charged under hard-switching conditions, the energy dissipated by the hard-switch event is about 3-5 times higher than the energy stored in that very same capacitance.  (This sounds wrong, but you only get loss equal to capacitor energy when the capacitance is constant.  When it's dependent, more or less energy ends up in the loss part instead.)

About inductance:

Above a few hundred watts for low voltages, and a few thousand watts for high voltages, it is not possible to "minimize inductance".

By the way, it was NEVER the best idea to minimize loop inductance, even where it can be reduced to the required degree; the only reason that ever caught on is because people like lazy, oversimplified rules to live by, rather than thinking for themselves.  And, at the time (the early history of switching supplies), the BJTs used were rather slow (at best, ~100ns t_f), and space and efficiency demands were nonexistent (it's not hard to be better than the direct predecessor: an iron cored transformer!).

Because of the above constraints (size, speed and efficiency), the required switching speeds mean unavoidable voltage drops across package inductance, and therefore the unavoidable optimization, not minimization, of switching loop inductance.

I've used both techniques with great success. A simpler version of the second which is usually sufficient provided the modules are reasonably well matched and, ideally, have a modestly positive tempco for Vce[sat] (e.g. - NPT IGBT) is to simply put some low-permeability toroid cores in series with each inverter (or chopper) output. The small amount of series inductance helps to prevent radical jumps in current in each leg as a result of the total bus current attempting to shift into whichever leg turns on first or turns off last. More precise control of volt-seconds per leg can be had with a saturable reactor magnetic amplifier, but I've had good results just tossing in a few KoolMu toroids and calling it a day.

Yeah, just the AC version of "wire regulators in parallel by adding series resistors" hack -- downside is you drop voltage across the inductors, which wastes some VAs, and may have implications for some types of converters (like causing worse ringing on a half/full bridge forward converter, or needing to be the right total value on a LLC resonant converter).

The opposing-single-turn method, also known as a 0-degree hybrid, or power combiner, or simply, a centertapped inductor being driven in the common mode: this does the best job, because it provides that degree of freedom between the two terminals, while delivering load current with minimal added inductance.  (For N outputs, you need N-1 degrees of freedom, and thus minimum N-1 number of cores.  If N is a whole power of 2, you can use pairwise power combiners, of increasing size, to get equal balancing flux between all outputs.

Afraid I don't have any pictures of the construction, but it was pretty neat with all the cores woven into the Cthulhu-of-Litz.

Tim

[MagicSmoker]

Not switching any faster than necessary and good layout (specifically, minimizing stray inductance in the switching node interconnects) can reduce or even eliminate the need for snubbing (or snubbering, if you like your English extra-mangled)....

This isn't possible anymore.

Funny, because I have a 700VDC/1600A locomotive DC drive that says otherwise. I used film capacitors for both bypass and reservoir duty on the input, a laminated bus structure to minimize the inductance of the capacitor-switch-diode loop and even without any snubbering/damping of the switches or freewheeling diodes the output waveform is totally free of ringing with a max overshoot during switch turn-off of about 40V at 1000A output. PWM frequency is only 2kHz but turn-on time is in the 250ns range, with turn-off time a much more leisurely ~1us (both times are about as fast as the 1200V NPT IGBTs can manage).

Brick modules are a mixed bag.  Microsemi's modules have essentially maximum stray inductance; even their MOSFETs top out at 200kHz, which is laughable.  Infineon, Powerex and others have newer modules that are internally routed for low inductance, and can operate cleanly at rated switching speed.

I've mainly been using Semikron modules the last few years (which mainly use Infineon dice) but Fuji's modules are pretty good, too. Powerex modules (which use Mitsubishi dice) are pretty slow and tend to have a higher forward drop, relatively speaking, but I totally agree that Microsemi's modules are terrible.

Above a few hundred watts for low voltages, and a few thousand watts for high voltages, it is not possible to "minimize inductance".

It is always possible to minimize stray inductance; it's not always possible to minimize it to the same amount in a 1kW (or 1MW) converter as in a 100W one, though.

By the way, it was NEVER the best idea to minimize loop inductance, even where it can be reduced to the required degree; the only reason that ever caught on is because people like lazy, oversimplified rules to live by, rather than thinking for themselves.  And, at the time (the early history of switching supplies), the BJTs used were rather slow (at best, ~100ns t_f), and space and efficiency demands were nonexistent (it's not hard to be better than the direct predecessor: an iron cored transformer!).

Because of the above constraints (size, speed and efficiency), the required switching speeds mean unavoidable voltage drops across package inductance, and therefore the unavoidable optimization, not minimization, of switching loop inductance.

Welp, now you've totally gone off the rails on a crazy train, to paraphrase Ozzy Osborne. No one minimizes loop inductance because a few volt-microseconds might be lost, one does it to minimize the amount of energy stored in an inductance that for certain portions of the switching cycle will be *unclamped*, and thereby reduce overshoot and/or ringing when the switch (or fwd) turns off (the latter only being an issue in discontinuous current mode operation). Indeed, the sole reason for needing to put a snubber across the switch in the first place is because of stray inductance in the input capacitor-switch-fwd loop!

Granted, a bit of inductance in the switching node (ie - the path between the switch and fwd) can be used as part of a lossless snubber network to reduce the deleterious effects of the switch turning on faster than the fwd can turn off, but when one makes a lossless snubber one provides an outlet for the energy stored in its snubber inductance (usually back to the input reservoir/bypass capacitor).

Yeah, just the AC version of "wire regulators in parallel by adding series resistors" hack -- downside is you drop voltage across the inductors, which wastes some VAs, and may have implications for some types of converters (like causing worse ringing on a half/full bridge forward converter, or needing to be the right total value on a LLC resonant converter).

You call it a hack, I call it an elegant and very inexpensive solution that gets the job done. Don't let perfection be the enemy of the good and all that.

[MagicSmoker]

Too many assumptions are being made, probably due to the extreme ambiguity of details on how this may be accomplished.

I just want input on if something like this would be considered valuable and what you would do with it.  I know it seems like a stretch of the imagination that this could work and be low cost, but that doesn't mean it's not possible.  Just assume that the issues you think of have been solved.

Extraordinary claims require extraordinary evidence... I laid out some physical reasons why what you want to do is impractical, and no amount of cleverness in your schematic will get around them. Are you planning on immersing the pcb and components in Fluorinert, a la a 1980's Cray, or what?

[Siwastaja]

Motor drives can be large and use low switching frequencies, because they can't use "smaller inductors", because the inductors they use - the motors - are still limited to fundamental frequencies way below 500Hz, and it seems this is not going to change any time soon.

So, when you generate a fundamental sine at a few hundred Hz, it's enough to get the chopper out of the audible range (if even that matters), and that's about it. The biggest part of the system is the motor.

[T3sl4co1l]

Funny, because I have a 700VDC/1600A locomotive DC drive that says otherwise. I used film capacitors for both bypass and reservoir duty on the input, a laminated bus structure to minimize the inductance of the capacitor-switch-diode loop and even without any snubbering/damping of the switches or freewheeling diodes the output waveform is totally free of ringing with a max overshoot during switch turn-off of about 40V at 1000A output. PWM frequency is only 2kHz but turn-on time is in the 250ns range, with turn-off time a much more leisurely ~1us (both times are about as fast as the 1200V NPT IGBTs can manage).

Heroic efforts ("laminated bus structure"), slow switching (>250ns), low operating frequencies (~2kHz), and huge filter inductors (of course, implicit in the motor in this case, so not a waste of space, which is nice!) basically prove my point.

40V overshoot means you had on the order of (40V) / (1000A/0.25us) = 0.01uH, which would be quite good for modules.  About as low as you can get, and indeed, a laminated bus will only add maybe 3nH, so this isn't unreasonable.

The real value is probably more like 20-30nH, because the switching doesn't occur instantly (dI/dt isn't instantly there and gone, but itself ramps up and down), and because capacitances, Miller effect and such slows down dV/dt and adds dampening.  This is absolutely typical of modules, so the example is consistent.

The junction capacitance will be on the order of 5nF, and with a 20nH loop inductance, you have a 1/2 wave commutation period of 31ns, well under the risetime of the transistors used.

The same setup would be okay for switching at >2 ohms (e.g., 700VDC and 350A) with faster transistors (assuming no added capacitance) and a higher switching frequency, but would probably need to be derated a bit in the process.  (We are talking dozens of kW, so a small hit in efficiency is a big deal.)

Those modules are many times larger than discrete parts, so it should be no surprise that they can't be very fast.  Indeed, even 1200V IGBTs can be made faster: e.g., IXYH82N120C3 claims 93ns t_f.  But it would be foolish to release a module that can't physically handle its own performance, let alone whatever the customer might bolt onto it.  (Which is to say, a laminar bus structure isn't at all necessary: parallel solid bars will do almost as well, and are cheaper to design and fab in small quantity.)

For motive power applications, it hardly matters.  There are many exceptions to my previous post: if you are space constrained, but not inductor constrained, that's one right there.  If you're not space constrained, that's another.  If you're not efficiency constrained, that's still another (RF amplifiers, usually in the 50-80% eff. range, being the realization of this).

I'm not concerned about things that are unconstrained.  That's boring and uninteresting!

I've mainly been using Semikron modules the last few years (which mainly use Infineon dice) but Fuji's modules are pretty good, too. Powerex modules (which use Mitsubishi dice) are pretty slow and tend to have a higher forward drop, relatively speaking, but I totally agree that Microsemi's modules are terrible.

Yeah, Semikron, don't know why that didn't come to mind yesterday.  Also Eupec (now Infineon).

It is always possible to minimize stray inductance

My point is that it's not, and using one example (which fails to meet the criteria for a tightly constrained design) isn't disproof at all.

Take a look at GaN FETs, for instance.  They have a tiny fraction of the capacitance that Si MOSFETs do, and switch in fractional nanoseconds if you want to!  It is physically impossible to place a ~5mm DFN style package, on a PCB of commodity tolerances and stackup, and to get a loop inductance low enough to implement a low impedance (say, <30V, >30A) inverter.  The board itself is too thick, and component packages are too long!

I've seen many appnotes, even just for silicon transistors, where they try to do the same old thing, try and try again, and fail miserably.  I like to use this one as a negative example:
http://www.ti.com/lit/an/slpa010/slpa010.pdf
See how the "optimized" layout (waveform Fig.11) accomplishes nothing?  Or damping (Fig.18) deals with the ringing, but not the overshoot.

The author (who I'm sure was just a summer intern, so...) didn't realize that, if he had instead increased the loop inductance, and clamped its flyback voltage with a diode, then both the peak and the ringing would be controlled, with little impact on efficiency (or even gaining benefit).

Other absurdities abound; I have an LTC3810 demo board that makes <5ns pulses, nearly the full height of the supply.  The common mode noise extends pretty much everywhere on the board.

Dev kits might also be designed by interns, but I'd expect more from FAEs; the best ours could offer was "put a ferrite bead on it?".

These are the reasons I am still in business, and quite well at that.

Welp, now you've totally gone off the rails on a crazy train, to paraphrase Ozzy Osborne. No one minimizes loop inductance because a few volt-microseconds might be lost, one does it to minimize the amount of energy stored in an inductance that for certain portions of the switching cycle will be *unclamped*, and thereby reduce overshoot and/or ringing when the switch (or fwd) turns off (the latter only being an issue in discontinuous current mode operation). Indeed, the sole reason for needing to put a snubber across the switch in the first place is because of stray inductance in the input capacitor-switch-fwd loop!

See, this is the misunderstanding that so many people face:

The loop inductance is an integral part of the switching circuit.

There are two regions you can design to: "minimize" or "optimize".

To ignore either, results in poor efficiency, or outright destruction.

"Minimize" works much the same as an RLC circuit.  Consider the waveform of discharging a capacitor.

If it's electrolytic, and the lead length is short, there won't be any ringing (ESR >> sqrt(L/C)).  The current rises quickly to V/R (but not instantaneously, because L is nonetheless present), then discharges along an RC exponential decay.

If it's a film or ceramic cap, it's very likely that the component body length and terminals contain enough stray inductance that sqrt(L/C) > ESR, and it will ring down.

By the same way, if you have Zsw (= Vsupply / Ipk) much larger than sqrt(Lstray/Coss), and switching speed much longer than pi*sqrt(Lstray/Coss), you won't have significant overshoot or ringing, and while you won't be at maximum efficiency, you won't have excess noise and overshoot.  You might not be able to increase efficiency any further, due to available choice of Vce(sat) and t_r, t_f (which was true back in the days of BJT switching circuits, when those old ideas were widely circulated).

However, for an 'optimal' case, you should match these quantities, and since you are storing an important amount of energy in those reactive components each half-cycle, you must ferry that energy back and forth in a responsible manner.  As you mention, quasi/resonant snubbers can do this, or you can use diodes to clamp it.  Even simply burning the energy into a resistor yields advantage: a dumb RC snubber allows the transistor to turn off more completely at a lower voltage, without dissipating too much energy itself, resulting in slightly less total losses (about a 10% reduction in switching losses).  See:
http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=4158300&url=http%3A%2F%2Fieeexplore.ieee.org%2Fxpls%2Fabs_all.jsp%3Farnumber%3D4158300
If you want cleaner waveforms, dV/dt and dI/dt (RCD and RLD) snubbers can be used.  They can also be designed to dump the excess energy into a supplementary supply rail, which can be "stirred" back into the main supply with a secondary converter.  Or you can use quasi-resonant types, but these consume excess switching capacity (nearly doubling the peak current or voltage demands), so while they remain simple, they aren't always the best option.

Tim