The Vbe inferred in these equations is the Vbe at the actual Base Emitter Junction, not the Base Emitter terminals which include parasitic resistances. This intrinsic active junction Vbe is not even the Vbe on a chip transistor Base and Emitter because of the doping, contact and metallization resistances to get to the actual active junction where this Vbe is referenced. Then of course the junction is not an ideal "Step Junction" and is distributed over some distance with some additional finite resistances.
If you include the base and emitter contact & parasitic resistances, and the junction distribution resistance, then you discover that the external Vbe (Vbe') is far removed from the active intrinsic junction Vbe. This is influenced by these resistances which allow Beta to come into play by means of the emitter resistances which alter the active emitter side of the junction as Re*Ie = Re(Ic + Ib) = Re*Ic(1+ 1/Beta), where Re is the sum of all the emitter resistances. Likewise the base junction side is influnced by the total base resistances as Rb(Ib) = Rb*Ic/Beta.
Taking these into account and one arrives at;
Vbe = Vbe' -Re(Ic(1+ 1/Beta)) -Ic*Rb/Beta, where Vbe is the active intrinsic Vbe
And Vbe' is the extrinsic Base Emitter Terminal Voltage, and Vbe is the active junction Vbe.
Now introducing back into the classic equation:
Ic = Is{exp(Vbe' -Re(Ic(1+ 1/Beta)) -Ic*Rb/Beta)/vt -1}, which of course is transcendental.
Also note this does not include the distributed junction resistive effects which further complicates things!
If the resistances are very low, as is Ic, then this reduces to,
Ic = Is{exp(Vbe'/vt) -1}
Please check the math as this was just derived in my head and likely an error introduced.
Edit: Yep found one, equation above lacked a close ")" bracket!!
Anyway, the point is the terminal Vbe' is quite removed and different from the actual active junction Vbe, and this is how the Beta enters and influences the collector current.
Most modern bipolar models include some of the parasitic resistances and produce reasonable results under simulation.
Note the above assumes the transistor is not Saturated nor in Quasi-Saturation.
Best