What is the exposed pad area required for NCP1117 voltage regulator

[Sai teja]

Hello,
We are using NCP1117 to obtain stable 3.3 V in our application. Page 8 Datasheet shows recommended exposed pad area for adequate thermal dissipation. But the value of L is not clearly mentioned. Can someone one help me telling the value of L ?

In addition to that, the recommended expose pad area is for 2 oz copper thickness single sided PCB but we designed board for 1 oz copper thickness dual sided PCB. Can I go for same same pad area both sides of PCB? 

And is it necessary to isolate the exposed pad?

Please help me in providing the answers to the above questions. Link to the datasheet is provided below.
https://www.onsemi.com/pub/Collateral/NCP1117-D.PDF

[picandmix]

Hi,

The calculation of the required heatsink area L, the bottom value on the graph,  first depends on  two key values  Voltage In and Current Out, which you haven't shown.


Believe you can use both side of the board, provided you have lots of though hole vias to transfer some of the heat

[KhronX]

In case it might help, a while ago i read about, and subsequently found, this app note from International Rectifier, for some rough junction-to-ambient thermal resistances for several SMD packages:

https://www.infineon.com/dgdl/an-994.pdf?fileId=5546d462533600a40153559fbca1125b

It's especially handy since they give numbers for minimum (strictly pad area), "modified minimum" (the almost entire area of the component footprint) and 1 sqin copper surface.

[Sai teja]

I am using two voltage regulators in my application

Voltage Regulator 1 :
Vin : 8.4 V,  Vout : 5 V , I out : 400 milli amps

Voltage Regulator 2 :
Vin : 8.4 V,  Vout : 3.3 V , I out : 150 milli amps

According to these specifications, please suggest the required expose pad area. We designed dual side board with Cu thickness 1oz .

[KhronX]

8.4 - 5 = 4.4v drop
4.4 * 0.4 = 1.76W to dissipate

Same math goes for the second regulator (surely some simple arithmetic shouldn't be too much trouble).

You'll want the die to be well under 100C, to be on the safe side. Pessimistically, one could take around 40C ambient temperature. This means you'll want, if possible, to keep the temperature rise within 60C or so, for the power you need to dissipate.

You haven't mentioned which package the NCP1117 will be. If you look on page 2 of the datasheet, you'll see the thermal resistances are vastly different between the two.

[Sai teja]

Sorry for missing out the details. I am using SOT-223 package.  please suggest the area of expose pad required for dual layer board with 1 oz cu thickness.

[KhronX]

So you really want / expect someone else to do some basic math for you? 

[chris_leyson]

Useful Fairchild application note for SOT-223 package https://www.fairchildsemi.com/application-notes/AN/AN-1028.pdf
TI have a useful thermal calculator http://www.ti.com/adc/docs/midlevel.tsp?contentId=76735

For voltage regulator 1 you will probably need at least a square inch of copper top and bottom, also, changing the package to DPAK TO-252 will lower the junction to case thermal resistace.