Turing 6502 - Simple TTL build of a 6502 microprocessor

[matthewregan]

Hello, I'm Matt Regan.



I'm publishing a set of videos on how to build a 6502 CPU.
I'm using a Turing Machine and emulating the 6502, so the design is very simple.

I was hoping to get some feedback, thoughts and opinions.

Currently working on Part 3.

Regards
Matt.

[benst]

Nice, subscribed!

Ben

[AccountRemovedPerUsersRequest]

Welcome to the club!
This is mine.

[matthewregan]

Very good.  Out of interest how fast does it run?
Mine seems OK at 100KHz but at ~1M it is very sensitive to capacitor placement and I start to get some errors.
Could probably improve my power distribution.

[AccountRemovedPerUsersRequest]

I did not test the max frequency at the time I had the breadboard version running. The max stable frequency for PCB version (attached) is 2.7MHz.

A

[matthewregan]

Very good, I got similar numbers on the PCB version


(the important section is 45 seconds into this video)


It's clocked at 3.5 Mhz, but I lose some performance sending pixels back over the USB.
I don't have any fixed hardware for the ALU, PC, IR, Acc, SR etc, so it takes about ~2.5 clocks (average) per 6502 clock.
So this Pacman demo is very close to the equivalent of real-time on an Apple 2.

[matthewregan]

Part 3 is complete and freshly uploaded.
This video explains in detail why I designed the memory system the way I did.

https://youtu.be/sb2DaRAZ17s

[ledtester]

Very interesting approach to building a TTL CPU.

So if I understand everything correctly, with your final PCB version the Turing machine is running at around 3.5 MHz and at that speed it is able to simulate a 6502 running at 1 MHz?

I'm curious how the timings of the individual instructions compare -- have you done any analysis or measurements?

[JuanGg]

Interesting indeed. I'll be sure to check out your videos.

Here is my overly complicated and convoluded (but functional) implementation of a 6502 CPU. The inverse wire-wrapping is certainly a nice technique.
It just brute-forces the control unit with several EEPROMs. Not the most elegant thing for sure.

    Juan

https://juangg-projects.blogspot.com/2020/07/6502-compatible-ttl-computer.html

[matthewregan]

Yep, it actually takes about 2.5 clocks per 6502 clock.
This is based on the emulator for 20 million instructions.
AppleWin took 57 million clocks and the Turing 6502 took 140 million clocks.

The remaining slowdown is due to the clock stopping for Arduino access.

In the Pure Turing playlist I'll go through the architectural changes that get us closer to the 6502 architecture.

[matthewregan]

Hi Juan,

Actually, I've watched your youtube video many times, I think I was one of the first to like it.

Props to anyone who can get a TTL 6502 to work.  I personally didn't want to design another custom CPU that only does a Fibonacci. 
The 6502 is a tough bird.

I took a bit of a different approach, I wanted to bridge the gap between a Turing Machine and Von Neumann architecture.

I'm curious to see what you think of this approach.

Regards,
Matt.