Silly question, did you try to feed the HSync, VSync and the video to for example the red channel of a VGA monitor? (Edit: don't do that, just read it and saw you have 3.5V on your video signal, so you need to adjust that to not exceed 0.7V)
As long as the HSync and VSync are at TTL/CMOS levels (5V or 3.3V) and your video is within the 0-0.7V it should be fine for the monitor, other than it might not support it and it wont lock to the signal.
Edit: for what I read you are getting 3.5V on the video signal. So maybe not plug it directly you have to bring down that video signal to 0.7V max.
Edit2: but it's unclear, you have your probes set to 10x so does that mean your video signal is from 0 to 0.35V? the scope captures show 1.25V or so with 10X so 0.125V so that's not clear, because they are pretty zoomed out.
Your timings seem to match 1/3 of this resolution on the vertical:
http://tinyvga.com/vga-timing/1600x1200@60HzIf you divide the Horizontal timings by 3 as well that would be an 18MHz pixel clock (~55.56ns per pixel)
I was doing a project driving a VGA screen with an MCU, I can play with plugin in those values and see if my VGA LCD panel locks to something like 533x400(visible 720x417 total including the front, back and pulse signals) which seems it will match your timings (other than the sync pulses are positive while yours are negative, but I can change those on my module as well).
For example these are the values I used for 800x600@60Hz

using the values in here:
http://tinyvga.com/vga-timing/800x600@60HzMore info on my project here:
https://www.eevblog.com/forum/projects/no-bitbanging-necessary-or-how-to-drive-a-vga-monitor-on-a-psoc-5lp-programmabl/I'll test it and report back to see if it locks.