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| UART ESD Protection: With or Without Zener tied to Vdd? |
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| JDW:
I am using the UART module of a PIC MCU to communication with an external Fingerprint Sensor. The sensor is a satellite unit connected to my main module containing the PIC and 3.3V power supply (PSU) via 1.5m cable. For that reason I wish to add ESD protection on Tx and Rx within my PIC & PSU module. Here are 2 ESD protection parts I am considering: The part shown at LEFT above has the Zener tied to Vdd -- the 3.3V rail that powers my PIC MCU and also will be fed across the cable to power the fingerprint sensor too. The part shown at RIGHT above does not have the Zener connected to Vdd at all. In the event of a positive ESD spike, the part at RIGHT will channel the surge current through the Zener to GND, but the part at LEFT will channel the current to Vdd. Since my 3.3v power supply is 250mA max, I'm concerned that the ESD spike would pull down my 3.3V rail due to excess current flow and therefore would it be best for me to select the part at RIGHT which doesn't connect to Vdd at all? Or does it not matter that the short-term ESD spike will yank down my power supply voltage? My PSU is a buck regulator with a 22uF X7R ceramic cap on the output of my PSU, along with a couple 47uF (ESR=140m-ohm) aluminum electrolytic caps placed elsewhere on the PCB (and of course 0.1uF ceramic caps here and there). So perhaps that capacitance will maintain the 3.3V rail voltage during the spike even if I select the part at LEFT? I would appreciated hearing your thoughts. Thank you. |
| Ian.M:
Consider the direction of current flow during an ESD event. If the discharge is from a negatively charged object, the lower diodes conduct, clamping the signal to one Vf drop below ground. If its from a positively charged object the top diodes conduct, clamping it to one Vf drop above Vdd. It can *NEVER* act to pull down the Vdd pin. However it can cause the ESD protector's Vdd pin to rise till its Zener breaks down and passes enough current to handle the discharge. A sizeable low ESR and low ESL capacitance at the Vdd pin, e.g a pair of 1nF ceramics right next to the pin, and 100nF ceramic next to them to spread out the ESD discharge impulse thus reducing the peak Zener clamping voltage would be desirable. You'll have to determine if the rest of the system can tolerate Vdd surging to the Zener's clamping voltage, or whether you'll need to provide a dedicated clamping rail that can actually sink the surge current without rising excessively. If you can tolerate the signals rising to the Zener's clamping voltage (e.g. by resistors between the ESD protector and the I/O pins to limit the current in the I/O pins internal clamping diodes), it mayt be as simple as a resistor between the (decoupled) ESD protector Vdd pin and the main Vdd rail to limit the current at the peak clamping voltage to less than the minimum load on the Vdd rail. Resistors inline in the signals between the cable and the ESD protector can help considerably by limiting the peak surge current. Running single-ended unbuffered logic level signals and logic Vcc supply over extended cabling is generally a poor idea, however you'll probably get away with it if the connectors aren't user accessible, the cable is screened and you can limit the slew rate to prevent excessive ground bounce. Good practice would be to use RS-422 transmitters and receivers, or RS485 transceivers at both ends, and run fused but unregulated power to the far end and regulate it there to power the remote logic. The differential signalling, and local Vdd regulation virtually eliminate the ground bounce issue, and many transceiver ICs are already well protected against ESD. Depending on the application, you may be able to tolerate half-duplex comms with TX and RX sharing the same pair in the cable, so may not need to increase the number of wires in the cable. |
| JDW:
Thank you for the detailed reply and for correcting me about a positive-going transient NOT pulling down Vdd in the case of the ESD protection part shown at LEFT in my opening post. You spoke primarily about the part shown at LEFT in my photo, since it alone has the Zener tied to Vdd. But what use-case is there for the part at RIGHT since it doesn't connect to the positive voltage rail at all? The final device will be used in 12V and 24V vehicles, and wires will be hidden. The fingerprint sensor module needs to be as compact as possible because it will mount near the ignition switch and is why adding a second buck regulator inside the fingerprint module is not desired. Furthermore, the fingerprint module is already a self-contained PCB from the manufacturer, with it's own MCU and separate regulator. I show a photo of that sensor in my other thread post here. Despite it's onboard regulator, the fingerprint sensor module requires a nominal 3.3V power input (Vin-max=6.0V). Communication is logic level (HI=3.3V, LO=0V), 8-bit, Asynchronous, No Parity, 1 Start bit, 1 Stop Bit. Transmission is via UART (EUSART module on a PIC16F1508 MCU) at a slow 9600 baud, so even a thin cable (even 28AWG) run 1.5 meters will not adversely affect communication and that has been proven by testing. The following 5 wires will be run over a cable between the MCU Controller & PSU unit and the Fingerprint Sensor Module: 1. Vdd (3.3V sent by buck regulator on PIC MCU control module) 2. GND 3. UART-Tx 4. UART-Rx 5. 3.3V signal, sent only when optical sensor's frame is being actively touched, otherwise left floating (which requires a pull-down resistor on the MCU controller). |
| Ian.M:
The ESD protector on the right is incapable of dumping current into the Vdd rail so it can never cause the rail to rise during an ESD event or other input fault. The prices you pay for that are probably a higher differential between the minimum breakdown voltage at which it starts clamping, and the peak clamping voltage for a high current ESD event, as you cant add capacitance across the Zener. Also, as its diodes are unbiassed, their junction capacitance will load the signal more so it may be unsuitable for use on high speed data links. You need the capability to power-up/power-down the sensor module cleanly to prevent it corrupting its FLASH, so using a linear LDO with an enable pin to go from a nominal 5V down to 3.3V at the sensor head wouldn't be too much of an imposition. At an active current of 75mA, that would only be 130mW of extra dissipation. A small board connected to the sensor's power and I/O header could also have the voltage supervisor IC and and a buffer for the frame touch signal, as an off-board floating when inactive 3.3V logic level signal is asking for trouble in an automotive environment. |
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